A6850 ALTERA [Altera Corporation], A6850 Datasheet - Page 6

• Manufacturer Part Number: A6850
• Description: Asynchronous Communications Interface Adapter
• Manufacturer: ALTERA [Altera Corporation]

a6850 Asynchronous Communications Interface Adapter Data Sheet
86
Transmitter Control
Bits 5 and 6 of the control register are the tc bits, (see
are responsible for:
Receive Interrupt Enable
Bit 7 of the control register is the rie bit. When the rie bit is high, the
rdrf, ndcd, and ovr bits will assert the nirq output. When the rie bit is
low, nirq generation is disabled.
Status Register
The status register contains the status bits shown in
Table 5. Transmitter Control Bits
Table 6. Status Register Bits
Enabling or disabling the interrupt caused by a transmitter data
register empty (tdre) condition.
Controlling the request to send (nrts) signal.
Transmitting a break character on the txdata output.
tc1
0
0
1
1
Data Bit
0
1
2
3
4
5
6
7
tc0
0
1
0
1
Low
Low
High
Low
nrts
Receive data register full (rdrf)
Transmit data register empty (tdre)
Data carrier detect (ndcd)
Clear to send (ncts)
Framing error (fe)
Receiver overrun (ovr)
Parity error (pe)
Interrupt request (irq)
Transmit
Interrupt
Disabled
Enabled
Disabled
Disabled
Bit Name
Table
Table
Altera Corporation
6.
5). The tc bits
Character
Break
No
No
No
Yes