HIP9011_06 INTERSIL [Intersil Corporation], HIP9011_06 Datasheet
![no-image](/images/no-image-200.jpg)
HIP9011_06
Related parts for HIP9011_06
HIP9011_06 Summary of contents
Page 1
Data Sheet Engine Knock Signal Processor The HIP9011 is used to provide a method of detecting premature detonation often referred to as “Knock or Ping” in internal combustion engines. The IC is shown in the Simplified Block Diagram. The ...
Page 2
Pinout Pin Descriptions PIN NUMBER DESIGNATION 1 V Five volt power input GND This pin is tied to ground This pin is connected to the internal mid-supply generator and is brought out for bypassing by a ...
Page 3
Absolute Maximum Ratings DC Logic Supply -0.5V to 7.0V DD Output Voltage ...
Page 4
GND = 0V, Clock Frequency 4MHz ±0.1%, T Electrical Specifications V DD Unless Otherwise Specified (Continued) PARAMETER INPUT AMPLIFIERS CH0 and CH1 High Output Voltage CH0 and CH1 Low Output Voltage Voltage Gain ANTIALIASING FILTER Response 1kHz ...
Page 5
Timing Diagrams INT/HOLD CS t CSCH SCK t CSCF SI t SUH SO SYMBOL t Minimum time from CS falling edge to SCK rising edge. CSCH t Minimum time from CS falling edge to SCK falling edge. CSCF t Minimum ...
Page 6
V DD VMID 0.022µF GND CH0NI CH1NI CH1IN R in CH1FB R F CH0IN R in CH0FB R F TRANSDUCERS OSCIN 20pF 4MHz OSCOUT 20pF 1MΩ FIGURE 3. SIMPLIFIED BLOCK DIAGRAM OF THE HIP9011 IN AN AUTOMOTIVE APPLICATION Description ...
Page 7
Circuit Block Description Input Amplifiers Two amplifiers can be selected to interface to the engine sensors. These amplifiers have a typical open loop gain of 100dB, with a typical bandwidth of 2.6MHz. The common mode input voltage range extends to ...
Page 8
Integration is enabled by the rising edge of the input control signal INT/HOLD. Within 20µs after the integrate input reaches a logic high level, the output of the integrator will fall to approximately V , 0.125V. The output of the ...
Page 9
TABLE 3. FREQUENCY, GAIN, AND INTEGRATOR TIME CONSTANT BIT VALUE PER FREQUENCY FUNCTION (kHz) 0 1.22 1 1.26 2 1.31 3 1.35 4 1.40 5 1.45 6 1.51 7 1.57 8 1.63 9 1.71 10 1.78 11 1.87 12 1.96 ...
Page 10
ADDRESS DECODER SI SCK CS FIGURE 5. PROGRAMMABLE REGISTERS AND STATE MACHINE The Digital SPI Block diagram in Figure 5 shows the programming flow of the chip. An eight bit word is received at the SI port. Data is shifted ...
Page 11
Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...