Z53C80SCSI ZILOG [Zilog, Inc.], Z53C80SCSI Datasheet - Page 31

• Manufacturer Part Number: Z53C80SCSI
• Description: SMALL COMPUTER SYSTEM INTERFACE (SCSI)
• Manufacturer: ZILOG [Zilog, Inc.]

PS97SCC0200
Z
AC CHARACTERISTICS
DMA Write Target Send Cycle Table
Notes:
[1] Write Enable is the occurrence of /IOW and /DACK
[2] /EOP, /WR, and /DACK must be concurrently Low for at least T7 for
ILOG
No
1
2
3
4
5
6
7
8
9
10
11
12
13
proper recognition of the /EOP pulse.
Description
DRQ Low from /DACK Low
/DACK High to DRQ High
Write Enable Width
/DACK Hold from /WR High
Data Setup to End of Write Enable
Data Hold Time from End of /WR
Width of /EOP Pulse
/ACK Low to /REQ High
/REQ from End of /DACK (/ACK High)
/ACK Low to DRQ High (Target)
/ACK High to /REQ Low (/DACK High)
Data Hold from Write Enable
Data Setup to /REQ Low (Target)
[1]
[2]
[1]
Min
30
50
50
25
50
15
55
0
Max
100
60
80
90
70
Z53C80 SCSI
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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