HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 279
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HD6417641
Manufacturer Part Number
HD6417641
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417641.pdf
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10.3.6
IMR0 to IMR10 are 8-bit readable/writable registers that mask the IRQ and on-chip peripheral
module interrupts. When an interrupt source is masked, interrupt requests may be mistakenly
detected, depending on the operation state of the IRQ pins and on-chip peripheral modules. To
prevent this, set IMR0 to IMR9 while no interrupts are set to be generated, and then read the new
settings from these registers.
Table 10.3 shows the relationship between IMR and each interrupt source.
Bit
7
6
5
4
3
2
1
0
Interrupt Mask Registers 0 to 10 (IMR0 to IMR10)
Bit Name
IM7
IM6
IM5
IM4
IM3
IM2
IM1
IM0
Initial
Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Interrupt Mask
Table 10.3 lists the correspondence between the
interrupt sources and interrupt mask registers.
IMn
1: Interrupt source of the corresponding bit is masked.
0: When reading, Interrupt source of the corresponding
n = 7 to 0
bit is not masked. When writing, No processing.
Rev. 4.00 Sep. 14, 2005 Page 229 of 982
Section 10 Interrupt Controller (INTC)
REJ09B0023-0400
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