TC74AC109F_12 TOSHIBA [Toshiba Semiconductor], TC74AC109F_12 Datasheet - Page 5

no-image

TC74AC109F_12

Manufacturer Part Number
TC74AC109F_12
Description
Dual J-K Flip Flop with Preset and Clear
Manufacturer
TOSHIBA [Toshiba Semiconductor]
Datasheet
Timing Requirements
Minimum pulse width
(CK)
Minimum pulse width
( CLR , PR )
Minimum set-up time
Minimum hold time
Minimum removal time
( CLR , PR )
AC Characteristics
Propagation delay
time
(CK-Q, Q )
Propagation delay
time
( CLR , PR -Q, Q )
Maximum clock
frequency
Input capacitance
Power dissipation
capacitance
Note:
Characteristics
Characteristics
C
current consumption without load.
Average operating current can be obtained by the equation:
PD
I
is defined as the value of the internal equivalent capacitance which is calculated from the operating
CC
(opr) = C
Symbol
(C
f
C
t
t
t
t
C
max
pLH
pHL
pLH
pHL
PD
PD
IN
L
(Note)
(input: t
・V
= 50 pF, R
CC
Symbol
・f
t
t
t
W (H)
W (L)
W (L)
t
IN
rem
t
t
s
h
r
+ I
= t
L
CC
f
= 500 Ω, input: t
= 3 ns)
/2 (per F/F)
Test Condition
5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
V
CC
r
Test Condition
= t
(V)
f
= 3 ns)
Min
100
55
Ta = 25°C
Typ.
120
160
8.2
6.1
8.5
6.4
82
5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
V
CC
Max
13.9
14.4
8.7
9.1
10
(V)
TC74AC109P/F
25°C
Ta =
Limit
Min
100
8.0
5.0
7.0
5.0
9.0
5.0
0.0
0.0
3.0
2.0
1.0
1.0
1.0
1.0
Ta = − 40 to
55
85°C
2012-02-29
−40 to
85°C
Limit
Ta =
16.0
10.0
16.6
10.5
Max
8.0
5.0
7.0
5.0
9.0
5.0
0.0
0.0
3.0
2.0
10
MHz
Unit
Unit
pF
pF
ns
ns
ns
ns
ns
ns
ns

Related parts for TC74AC109F_12