TC74ACT112F_12 TOSHIBA [Toshiba Semiconductor], TC74ACT112F_12 Datasheet

TC74ACT112F_12

Manufacturer Part Number

TC74ACT112F_12

Description

Dual J-K Flip Flop with Preset and Clear

Manufacturer

TOSHIBA [Toshiba Semiconductor]

Datasheet

1.TC74ACT112F_12.pdf (8 pages)

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Dual J-K Flip Flop with Preset and Clear

FLIP FLOP fabricated with silicon gate and double-layer metal

wiring C

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

TTL or NMOS to High Speed CMOS. The inputs are compatible

with TTL, NMOS and CMOS output voltage levels.

device changes state on negative going transition of the clock

pulse. CLEAR and PRESET are independent of the clock and

accomplished by a low logic level on the corresponding input.

discharge or transient excess voltage.

Features

•

Pin Assignment

The TC74ACT112 is an advanced high speed CMOS DUAL J-K

It achieves the high speed operation similar to equivalent

This device may be used as a level converter for interfacing

In accordance with the logic level given J and K input this

All inputs are equipped with protection circuits against static

High speed: f

Low power dissipation: I

Compatible with TTL outputs: V

Symmetrical output impedance: |I

Balanced propagation delays: t

Pin and function compatible with 74F112

MOS technology.

max

= 175 MHz (typ.) at V

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74ACT112P,TC74ACT112F

= 4 μA (max) at Ta = 25°C

pLH

Capability of driving 50 Ω

transmission lines.

= 0.8 V (max)

∼ − t

= 2.0 V (min)

| = I

pHL

= 5 V

= 24 mA (min)

Weight

DIP16-P-300-2.54A

SOP16-P-300-1.27A

TC74ACT112P

TC74ACT112F

TC74ACT112P/F

: 1.00 g (typ.)

: 0.18 g (typ.)

2012-02-29

Related parts for TC74ACT112F_12

TC74ACT112F_12 Summary of contents

Page 1

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT112P,TC74ACT112F Dual J-K Flip Flop with Preset and Clear The TC74ACT112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C MOS technology. 2 ...

Page 2

IEC Logic Symbol Truth Table Inputs J K CLR ...

Page 3

Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC V /ground current CC Power dissipation Storage temperature Note 1: Exceeding any of the absolute ...

Page 4

Electrical Characteristics DC Characteristics Characteristics Symbol High-level input V IH voltage Low-level input V IL voltage High-level output V OH voltage Low-level output V OL voltage Input leakage I IN current I CC Quiescent supply current I C Note: This ...

Page 5

AC Characteristics ( pF Characteristics Symbol Propagation delay t pLH time t pHL ( CK - Propagation delay t pLH time t pHL ( CLR , PR - Maximum clock f max ...

Page 6

Package Dimensions Weight: 1.00 g (typ.) TC74ACT112P/F 6 2012-02-29 ...

Page 7

Package Dimensions Weight: 0.18 g (typ.) TC74ACT112P/F 7 2012-02-29 ...

Page 8

RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. • This document and ...

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