TC74HC109AF_07 TOSHIBA [Toshiba Semiconductor], TC74HC109AF_07 Datasheet - Page 5

• Manufacturer Part Number: TC74HC109AF_07
• Description: CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip-Flop with Preset and Clear
• Manufacturer: TOSHIBA [Toshiba Semiconductor]

Timing Requirements
Minimum pulse width
(CK)
Minimum pulse width
( PR , CLR )
Minimum set-up time
Minimum hold time
Minimum removal time
( PR , CLR )
Clock frequency
AC Characteristics
Output transition time
Propagation delay time
(CK-Q, Q )
Propagation delay time
( PR , CLR -Q, Q )
Maximum clock frequency
Characteristics
Characteristics
(C
L
(input: t
= 15 pF, V
Symbol
t
t
t
W (H)
W (L)
W (L)
t
rem
t
t
f
s
h
r
Symbol
= t
t
t
t
t
t
t
f
TLH
THL
pLH
pHL
pLH
pHL
max
CC
f
= 6 ns)
= 5 V, Ta = 25°C, input: t
5
Test Condition
⎯
⎯
⎯
⎯
⎯
⎯
Test Condition
⎯
⎯
⎯
⎯
r
= t
V
CC
f
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
= 6 ns)
TC74HC109AP/AF/AFN
(V)
Typ.
Min
33
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Ta = 25°C
Limit
Typ.
75
15
13
75
15
13
75
15
13
50
10
31
36
13
13
63
0
0
0
9
6
6
2007-10-01
~85°C
Limit
Ta =
Max
−40
95
19
16
95
19
16
95
19
16
65
13
11
25
29
12
26
26
⎯
0
0
0
5
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns