PEF2054 SIEMENS [Siemens Semiconductor Group], PEF2054 Datasheet - Page 108

• Manufacturer Part Number: PEF2054
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Figure 32 shows the relationship between the DCL input and the generated RCL for the
different prescaler divisors in case CMD1:CSS = 1:
Figure 32
Clock Signal Timing for the Different Prescaler Divisors if CMD1:CSS = 1
CFI Clock Output Rate CMD2:COC
This feature applies only if the configurable interface is clocked and synchronized via the
PCM interface clock and framing signals (PDC, PFS), i.e. if CMD1:CSS = 0.
In this case the EPIC delivers an output clock signal at pin DCL with a frequency identical
to or double the selected CFI data rate:
For CMD2:COC = 0, the frequency of DCL is identical to the CFI data rate
For CMD2:COC = 1, the frequency of DCL is twice the CFI data rate
Semiconductor Group
FSC
FSC
DCL
RCL
RCL
RCL
RCL
RCL
RCL
(all CFI modes)
(CFI modes 0 and 3 only!)
108
Conditions:
CMD1 : CSM = 1
CMD1
CFI Modes 0, 1 and 3
CFI Mode 2
CFI Modes 0, 1 and 3
CFI Mode 2
CFI Modes 0, 1 and 3
CFI Mode 2
:
Application Hints
CSM
=
0
PEB 2055
PEF 2055
ITT08047