PEF2054 SIEMENS [Siemens Semiconductor Group], PEF2054 Datasheet - Page 252

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PEF2054

Manufacturer Part Number
PEF2054
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Clock period low
Clock period high
Clock period
Clock period low
Clock period high
Frame set-up time to clock
Frame hold time from clock
Data clock delay
Serial data input set-up time
(rising clock edge)
Serial data hold time
Serial data input set-up time
Serial data hold time
Serial data input set-up time
Serial data hold time
Serial data input set-up time
Serial data hold time
PCM-serial data output delay
PCM and Configurable Interface Timing
Parameter
Clock period
Serial data input set-up time
(falling clock edge)
Tristate control delay
CFI-serial data output delay
CFI-serial data output delay
1) Parameter can be estimated to: 20 ns + 0.25 ns x [C L ]
2) The max. difference between T
Semiconductor Group
DCD
and T
Symbol Limit Values Unit Test Condition
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CP
CPL
CPH
CP
CPL
CPH
FS
FH
DCD
S
S
H
S
H
S
H
S
H
D
T
CDF
CDR
CDF
/ T
CDR
min.
240
80
100
120
50
50
25
50
7
15
35
15
55
20
50
0
75
252
is 60 ns / 35 ns
max.
125
55
60
65
90
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Characteristics
Clock frequency
Clock frequency
> 4096 kHz
2)
PCM-input data
frequency > 4096 kbit/s
PCM-input data
frequency
CFI-input data
frequency > 4096 kbit/s
CFI-input data
frequency
1)
1)
Falling clock edge
Rising clock edge
4096 kHz
4096 kbit/s
4096 kbit/s
PEB 2055
PEF 2055
2)
2)

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