ADL5565-EVALZ AD [Analog Devices], ADL5565-EVALZ Datasheet - Page 23

• Manufacturer Part Number: ADL5565-EVALZ
• Description: 6 GHz Ultrahigh Dynamic Range
• Manufacturer: AD [Analog Devices]

Data Sheet
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 44 show s the recommended land pattern for the ADL5565.
The
has an exposed ground paddle (EPAD). This paddle is internally
connected to the ground of the chip. To minimize thermal
impedance and ensure electrical performance, solder the paddle
to the low impedance ground plane on the PCB. To further
reduce thermal impedance, it is recommended that the ground
planes on all layers under the paddle be stitched together with vias.
For more information on land pattern design and layout, refer
to the
Guide for the Lead Frame Chip Scale Package (LFCSP).
This land pattern, on the
a measured thermal resistance (θ
the temperature at the top of the LFCSP package is found with
an IR temperature gun. Thermal simulation suggests a junction
temperature 1.5°C higher than the top of package temperature.
With additional ambient temperature and I/O power measure-
ments, θ
ADL5565
AN-772 Application
JA
could be determined.
is contained in a 3 × 3 mm LFCSP package, which
19.7mils
Figure 44. Recommended Land Pattern
ADL5565
Note, A Design and Manufacturing
59mils
JA
) of 60°C/W. To measure θ
evaluation board, provides
10mils
36mils
Rev. | Page 23 of 28
JA
,
B
EVALUATION BOARD
Figure 45 shows the schematic of the
The board is powered by a single supply in the 3 V to 5 V range.
The power supply is decoupled by 10 µF and 0.1 µF capacitors.
Table 16 details the various configuration options of the evaluation
board. Figure 46 and Figure 47 show the component and circuit
side layouts of the evaluation board.
To realize the minimum gain (6 dB into a 200 Ω load), Input 1
(VIN1 and VIP1) must be used by installing 0 Ω resistors at R3
and R4, leaving R5 and R6 open. R1 and R2 must be 33.2 Ω for
a 50 Ω input impedance.
Likewise, driving Input 2 (VIN2 and VIP2) realizes the middle
gain (12 dB into a 200 Ω load) by installing 0 Ω at R5 and R6
and leaving R3 and R4 open. R1 and R2 must be 50 Ω for a
50 Ω input impedance.
For the maximum gain (15.5 dB into a 200 Ω load), both inputs
are driven by installing 0 Ω resistors at R3, R4, R5, and R6. R1
and R2 are open for a 50 Ω input impedance.
The balanced input and output interfaces are converted to
single ended with a pair of baluns (M/A-COM ETC1-1-13).
The balun at the input, T1, provides a 50 Ω single-ended-to-
differential transformation. The output balun, T2, and the
matching components are configured to provide a 200 Ω to 50 Ω
impedance transformation with an insertion loss of about 11 dB.
As an alternative, the input transformer, T1, can be replaced with
one of the following transformers to provide a low loss balanced
input to the ADL5565.
•
•
•
When using these alternative transformers, R1 and R2 are left
open. Replace C1 and C2 with 0 Ω jumpers and add a 0.1 µF
capacitor to C12.
6 dB gain configuration, Mini-Circuits TC4-1W+
12 dB gain configuration, Mini-Circuits, TC2-1T+
15.5 dB gain configuration, Mini-Circuits TC1.5-52T
ADL5565
evaluation board.
ADL5565