OPA642N BURR-BROWN [Burr-Brown Corporation], OPA642N Datasheet - Page 14

• Manufacturer Part Number: OPA642N
• Description: Wideband, Low Distortion, Low Gain OPERATIONAL AMPLIFIER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

Note that it is the power in the output stage and not into the
load that determines internal power dissipation.
As a worst case example, compute the maximum T
OPA642N (SOT23-5 package) in the circuit of Figure 1
operating at the maximum specified ambient temperature of
+85 C. P
330mW. Maximum T
135 C.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a high frequency
amplifier like the OPA642 requires careful attention to
board layout parasitics and external component types. Rec-
ommendations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for all
b) Minimize the distance (< 0.25") from the power supply
c) Careful selection and placement of external components
of the signal I/O pins. Parasitic capacitance on the output
and inverting input pins can cause instability: on the non-
inverting input, it can react with the source impedance to
cause unintentional bandlimiting. To reduce unwanted
capacitance, a window around the signal I/O pins should
be opened in all of the ground and power planes around
those pins. Ground and power planes should be unbroken
elsewhere on the board.
pins to high frequency 0.1uF decoupling capacitors. At
the device pins, the ground and power plane layout
should not be in close proximity to the signal I/O pins.
Avoid narrow power and ground traces to minimize
inductance between the pins and the decoupling capaci-
tors. The primary power supply connections (on pins 4
and 7) should always be decoupled with these capacitors.
Optional output stage power supply connections on pins
5 and 8 may be used to get a slight improvement in
harmonic distortion and settling time (for the 8-pin pack-
aged parts). Place additional 0.1 F decoupling capacitors
very near to these pins to improve performance. Larger
(2.2 F to 6.8 F) decoupling capacitors, effective at lower
frequency, should also be used on the main supply pins.
These may be placed somewhat farther from the device
and may be shared among several devices in the same
area of the PC board.
will preserve the high frequency performance of the
OPA642. Resistors should be a very low reactance type.
Surface mount resistors work best and allow a tighter
overall layout. Metal film and carbon composition axially
leaded resistors can also provide good high frequency
performance. Again, keep their leads and PC board trace
length as short as possible. Never use wirewound type
resistors in a high frequency application. Since the output
pin and inverting input pin are the most sensitive to
parasitic capacitance, always position the feedback and
series output resistor, if any, as close as possible to the
output pin. Other network components, such as non-
inverting input termination resistors, should also be placed
close to the package. Where double side component
mounting is allowed, place the feedback resistor directly
under the package on the other side of the board between
D
= 10V • 26mA +5^2 /(4 • (100
®
OPA642
J
= +85 C + 0.33W • 150 C/W =
|| 804 )) =
J
using an
14
d) Connections to other wideband devices on the board may
the output and inverting input pins. Even with a low
parasitic capacitance shunting the external resistors, ex-
cessively high resistor values can create significant time
constants that can degrade performance. Good axial metal
film or surface mount resistors have approximately 0.2pF
in shunt with the resistor. For resistor values > 1.5k , this
parasitic capacitance can add a pole and/or zero below
500MHz that can effect circuit operation. Keep resistor
values as low as possible consistent with load driving
considerations. The 402
performance specifications is a good starting point for
design. Note that a 25
direct short is suggested for the unity gain follower
application. This effectively isolates the inverting input
capacitance from the output pin that would otherwise
cause a slight peaking in the gain of +1 frequency
response.
be made with short direct traces or through on-board
transmission lines. For short connections, consider the
trace and the input to the next device as a lumped
capacitive load. Relatively wide traces (50 to 100mils)
should be used, preferably with ground and power planes
opened up around them. Estimate the total capacitive load
and set R
tive Load. Low parasitic capacitive loads (< 5pF) may not
need an R
to operate with a 2pF parasitic load. Higher parasitic cap.
loads without an R
increases (increasing the unloaded phase margin). If a
long trace is required, and the 6dB signal loss intrinsic to
a doubly terminated transmission line is acceptable, imple-
ment a matched impedance transmission line using
microstrip or stripline techniques (consult an ECL design
handbook for microstrip and stripline layout techniques).
A 50 environment is normally not necessary on board,
and in fact a higher impedance environment will improve
distortion as shown in the Distortion vs Load plots. With
a characteristic board trace impedance defined based on
board material and trace dimensions, a matching series
resistor into the trace from the output of the OPA642 is
used as well as a terminating shunt resistor at the input of
the destination device. Remember also that the terminat-
ing impedance will be the parallel combination of the
shunt resistor and the input impedance of the destination
device: this total effective impedance should be set to
match the trace impedance. Multiple destination devices
are best handled as separate transmission lines, each with
their own series and shunt terminations. If the 6dB
attenuation of a doubly terminated transmission line is
unacceptable, a long trace can be series-terminated at the
source end only. Treat the trace as a capacitive load in
this case and set the series resistor value as shown in the
plot of R
signal integrity as well as a doubly terminated line. If the
input impedance of the destination device is low, there
will be some signal attenuation due to the voltage divider
formed by the series output into the terminating imped-
ance.
S
S
S
from the plot of recommended R
since the OPA642 is nominally compensated
vs Capacitive load. This will not preserve
S
are allowed as the signal gain
feedback resistor, rather than a
feedback used in the typical
S
vs Capaci-