MCP654 MICROCHIP [Microchip Technology], MCP654 Datasheet - Page 23

• Manufacturer Part Number: MCP654
• Description: 50 MHz, 6 mA Op Amps with mCal
• Manufacturer: MICROCHIP [Microchip Technology]

4.0
The MCP651/2/4/5/9 family of self-zeroed op amps is
manufactured using Microchip’s state of the art CMOS
process. It is designed for low cost, low power and high
precision applications. Its low supply voltage, low
quiescent current and wide bandwidth makes the
MCP651/2/4/5/9 ideal for battery-powered applica-
tions.
4.1
These op amps include circuitry for dynamic calibration
of the offset voltage (V
4.1.1
The internal mCal circuitry, when activated, starts a
delay timer (to wait for the op amp to settle to its new
bias point), then calibrates the input offset voltage
(V
after some power brown out events) by the internal
POR, and by the memory’s Parity Detector. The power
up time, when the mCal circuitry triggers the calibration
sequence, is 200 ms (typical).
4.1.2
The CAL/CS pin gives the user a means to externally
demand a low power mode of operation, then to
calibrate V
to correct V
see
The CAL/CS pin performs two functions: it places the
op amp(s) in a low power mode when it is held high,
and starts a calibration event (correction of V
rising edge.
While in the low power mode, the quiescent current is
quite small (I
a High-Z state.
During the calibration event, the quiescent current is
near, but smaller than, the specified quiescent current
(6 mA, typical). The output continues in the High-Z
state, and the inputs are disconnected from the
external circuit, to prevent internal signals from
affecting circuit operation. The op amp inputs are inter-
nally connected to a common mode voltage buffer and
feedback resistors. The offset is corrected (using a
digital state machine, logic and memory), and the
calibration constants are stored in memory.
Once the calibration event is completed, the amplifier is
reconnected to the external circuitry. The turn on time,
when calibration is started with the CAL/CS pin, is 3 ms
(typical).
There is an internal 5 MΩ pull-down resistor tied to the
CAL/CS pin. If the CAL/CS pin is left floating, the ampli-
fier operates normally.
© 2011 Microchip Technology Inc.
OS
Figure
). The mCal circuitry is triggered at power-up (and
APPLICATIONS
Calibration and Chip Select
OS
2-35) and across temperature.
OS
mCal CALIBRATION CIRCUITRY
CAL/CS PIN
SS
. Using the CAL/CS pin makes it possible
as it drifts over time (1/f noise and aging;
= -3 µA, typical). The output is also is in
OS
).
OS
) after a
For the MCP655 dual and the MCP659 quad, there is
an additional constraint on toggling the two CAL/CS
pins close together; see the t
Table
if they are toggled separately with an adequate delay
between them (greater than t
inputs are accepted as valid. If one of the two pins
toggles while the other pin’s claibration routine is in
progress, then an invalid input occurs and the result is
unpredictable.
4.1.3
This part includes an internal Power On Reset (POR)
to protect the internal calibration memory cells. The
POR monitors the power supply voltage (V
the POR detects a low V
the low power mode of operation. When the POR
detects a normal V
then triggers an calibration event. The additional delay
gives a total POR turn on time of 200 ms (typical); this
is also the power up time (since the POR is triggered at
power up).
4.1.4
A parity error detector monitors the memory contents
for any corruption. In the rare event that a parity error is
detected (e.g., corruption from an alpha particle), a
POR event is automatically triggered. This will cause
the input offset voltage to be re-corrected, and the op
amp will not return to normal operation for a period of
time (the POR turn on time, t
4.1.5
A V
MCP651) for those applications that need the calibra-
tion to occur at an internally driven common mode
voltage other than V
Figure 4-1
sets the op amp’s common mode reference voltage
(V
nected from the supplies at other times). The 5 kΩ
resistor provides over-current protection for the buffer.
FIGURE 4-1:
Input Circuitry.
V
CM_INT
CAL
CAL
1-3. If the two pins are toggled simultaneously, or
pin is available in some options (e.g., the single
300 kΩ
150 kΩ
) during calibration (the resistors are discon-
shows the reference circuit that internally
INTERNAL POR
PARITY DETECTOR
CALIBRATION INPUT PIN
MCP651/2/4/5/9
V
V
DD
SS
DD
5 kΩ
DD
Common-Mode Reference’s
event, it starts a delay counter,
/3.
DD
event, it places the part into
BUFFER
PON
CON
).
CON
), then the CAL/CS
To op amp during
DS22146B-page 23
specification in
V
CM_INT
calibration
DD
). When