CLC446A8B NSC [National Semiconductor], CLC446A8B Datasheet - Page 4

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CLC446A8B

Manufacturer Part Number
CLC446A8B
Description
400MHz, 50mW Current-Feedback Op Amp
Manufacturer
NSC [National Semiconductor]
Datasheet
http://www.national.com
Typical Performance Characteristics
The CLC446 has a current-feedback architecture built in
an advanced complementary bipolar process. The key
features of current-feedback are:
Current-feedback operation can be explained with a
simple model. The voltage gain for the circuits in Figures
1 and 2 is approximately:
The following topics will supply you with:
DC Gain (non-inverting)
The non-inverting DC voltage gain for the configuration
shown in Figure 1 is
The normalized gain plots in the
Characteristics section show different feedback
resistors (R
recommended for obtaining the highest bandwidth with
minimal peaking. The resistor R
the non-inverting input.
For A
ues to calculate the recommended value of R
5, the minimum recommended R
v
< 5, use linear interpolation on the nearest A
AC bandwidth is independent of voltage gain
Unity-gain stability
Frequency response may be adjusted with R
High slew rate
Low variation in performance for a wide range
of gains, signal levels and loads
Fast settling
Design parameters, formulas and techniques
Interfaces
Application circuits
Layout techniques
SPICE model information
V
V
f
in
) for different gains. These values of R
o
1
A
Z j
R
v
A
f
-0.1
-0.2
v
0.2
0.1
0
1n
Short Term Settling Time
1
R
R
g
f
10n
f
.
t
Typical Performance
is 200 .
provides DC bias for
CLC446 Design Information
Time (sec)
100n
CLC446 Operation
f
. For A
1
V
O
= 2V step
(V
CC
v
f
f
val-
are
10
= ±5V, A
v
4
where
The denominator of the equation above is approximately
1
frequency, the interaction between R
dominates the circuit performance. Increasing R
the following:
Select R
DC gain accuracy is usually limited by the tolerance of R
and R
v
-0.1
-0.2
0.2
0.1
= +2, R
0
at
1
Long Term Settling Time
g
V
.
A
R
Z(j ) is the CLC446’s open-loop
transimpedance gain
Decreases loop-gain
Decreases bandwidth
Lowers pulse response overshoot
Reduces gain peaking
Affects frequency response phase linearity
Z j
low
in
10
g
f
v
R
f
= 249
to set the DC gain:
is the feedback resistor
is the DC voltage gain
f
R
t
Figure 1: Non-Inverting Gain
100
frequencies.
is the loop-gain
Time (s)
R
1m
R
L
3
2
g
= 100 ; unless specified)
10m
CLC446
-
+
V
V
CC
EE
V
7
4
O
100m
= 2V step
6.8 F
0.1 F
0.1 F
6.8 F
Near
+
R
R
f
6
g
+
1
A
the
R
v
f
1
-3dB
.
f
V
and Z(j )
o
corner
Fi
f
does
f

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