EL5170 INTERSIL [Intersil Corporation], EL5170 Datasheet - Page 10

• Manufacturer Part Number: EL5170
• Description: 100MHz Differential Twisted-Pair Drivers
• Manufacturer: INTERSIL [Intersil Corporation]

Differential and Common Mode Gain Settings
As shown at the simplified schematic, since the feedback
resistors RF and the gain resistor are integrated with 200Ω
and 400Ω, the EL5170 and EL5370 have a fixed gain of 2.
The common mode gain is always one.
Driving Capacitive Loads and Cables
The EL5170 and EL5370 can drive 75pF differential
capacitor in parallel with 200Ω differential load with less than
3.5dB of peaking. If less peaking is desired in applications, a
small series resistor (usually between 5Ω to 50Ω) can be
placed in series with each output to eliminate most peaking.
However, this will reduce the gain slightly.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier’s output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help
to reduce peaking.
Disable/Power-Down
The EL5170 and EL5370 can be disabled and placed their
outputs in a high impedance state. The turn off time is about
1µs and the turn on time is about 200ns. When disabled, the
amplifier’s supply current is reduced to 2µA for I
120µA for I
power consumption. The amplifier’s power down can be
controlled by standard CMOS signal levels at the ENABLE
pin. The applied logic signal is relative to V
EN pin float or applying a signal that is less than 1.5V below
V
when the signal at EN pin is above V
Output Drive Capability
The EL5170 and EL5370 have internal short circuit
protection. Its typical short circuit current is ±80mA. If the
output is shorted indefinitely, the power dissipation could
easily increase such that the part will be destroyed.
Maximum reliability is maintained if the output current never
exceeds ±60mA. This limit is set by the design of the internal
metal interconnect.
Power Dissipation
With the high output drive capability of the EL5170 and
EL5370 it is possible to exceed the 125°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
S
+ will enable the amplifier. The amplifier will be disabled
S
- typically, thereby effectively eliminating the
10
S
+ -0.5V.
S
+ pin. Letting the
S
+ and
EL5170, EL5370
Where:
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
PD
Where:
By setting the two PD
can solve the output current and R
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the V
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from V
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the V
supply rail.
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
PD
T
T
θ
V
I
∆V
application
R
I
i = Number of channels
SMAX
LOAD
MAX
JA
AMAX
JMAX
S
LD
=
O
= Total supply voltage
i
= Thermal resistance of the package
×
= Differential load resistance
= Maximum differential output voltage of the
=



= Load current
= Maximum quiescent supply current per channel
V
= Maximum junction temperature
= Maximum ambient temperature
T
-------------------------------------------- -
S
JMAX
×
I
SMAX
Θ
–
JA
T
AMAX
+
MAX
V
S
×
equations equal to each other, we
∆V
----------- -
R
S
- pin becomes the negative
LD
O



LOAD
to avoid the device
S
- pin is
April 24, 2006
FN7309.6
S
+