CS18LV10245CC ETC1 [List of Unclassifed Manufacturers], CS18LV10245CC Datasheet
CS18LV10245CC
Available stocks
Related parts for CS18LV10245CC
CS18LV10245CC Summary of contents
Page 1
... Standby Typ. = 0.50uA, (Typical value @ Vcc = 5.0V Standard pin configuration 32 - SOP 450mil 32 - sTSOP-I - 8X13.4mm 32 - TSOP-I 8X20mm 32 - PDIP 600mil Product Family Part No. Operating Temp Vcc. Range Speed (ns) CS18LV10245CC CS18LV10245DC 0~70 CS18LV10245EC CS18LV10245LC CS18LV10245CI CS18LV10245DI -40~85 CS18LV10245EI CS18LV10245LI Note: Green package part no, sees order information. ...
Page 2
High Speed Super Low Power SRAM 128K-Word By 8 Bit PIN CONFIGURATIONS 32 SOP 450 mil 32 PDIP 600 mil BLOCK DIAGRAM Copyright 2004 March Chiplus Semiconductor Corp. All rights reserved. CS18LV10245 32 STSOP 8x13.4mm 32 TSOP(I) 8x20mm . Rev. ...
Page 3
High Speed Super Low Power SRAM 128K-Word By 8 Bit PIN DESCRIPTIONS Name A0-A16 These 17 address inputs select one of the 131,072 x 8-bit words in the RAM. Address Input /CE /CE is active LOW and CE2 is active ...
Page 4
High Speed Super Low Power SRAM 128K-Word By 8 Bit ABSOLUTE MAXIMUM RATINGS (1) Symbol V Terminal Voltage with Respect to GND TERM T Temperature Under Bias BIAS T Storage Temperature STG P Power Dissipation Output Current ...
Page 5
High Speed Super Low Power SRAM 128K-Word By 8 Bit DC ELECTRICAL CHARACTERISTICS Parameter Parameter Name V Guaranteed Input Low IL (2) Voltage V Guaranteed Input High IH (2) Voltage I Input Leakage Current Output Leakage OL ...
Page 6
High Speed Super Low Power SRAM 128K-Word By 8 Bit LOW Vcc DATA RETENTION WAVEFORM(1) LOW Vcc DATA RETENTION WAVEFORM(2) KEY TO SWITCHING WAVEFORMS WAFEFORM Must be standby May change for May change for ...
Page 7
High Speed Super Low Power SRAM 128K-Word By 8 Bit AC ELECTRICAL CHARACTERISTICS < READ CYCLE > JEDEC Parameter Parameter Name Name t t Read Cycle Time AVAX Address Access Time AVQV Chip Select ...
Page 8
High Speed Super Low Power SRAM 128K-Word By 8 Bit NOTES: 1. /WE is high in read Cycle. 2. Device is continuously selected when / Address valid prior to or coincident with CE transition low. 4. /OE ...
Page 9
High Speed Super Low Power SRAM 128K-Word By 8 Bit AC ELECTRICAL CHARACTERISTICS < WRITE CYCLE > JEDEC Parameter Parameter Name Name t t Write Cycle Time AVAX Chip Select to End of Write E1LWH CW t ...
Page 10
High Speed Super Low Power SRAM 128K-Word By 8 Bit SWITCHING WAVEFORMS (WRITE CYCLE) Copyright 2004 March Chiplus Semiconductor Corp. All rights reserved. CS18LV10245 Rev. 1 ...
Page 11
High Speed Super Low Power SRAM 128K-Word By 8 Bit NOTES measured from the address valid to the beginning of write The internal write time of the memory is defined by the overlap of /CE ...
Page 12
High Speed Super Low Power SRAM 128K-Word By 8 Bit 6. /OE is continuously low (/ the same phase of write data of this write cycle. OUT the read data of next ...
Page 13
High Speed Super Low Power SRAM 128K-Word By 8 Bit ORDER INFORMATION 1. NON-GREEN PACKAGE: CS18LV10245 Package: C: 32SOP (450mil) D: 32STSOP I (8x13.4mm) E: 32TSOP I (8x20mm) L: 32PDIP (600mil) 2. GREEN PACKAGE: CS18LV10245 Package: C: 32SOP (450mil) D: ...
Page 14
High Speed Super Low Power SRAM 128K-Word By 8 Bit PACKAGE DIMENSIONS - 32 pin SOP (450 mil pin STSOP I ( 8x13.4 mm Copyright 2004 March Chiplus Semiconductor Corp. All rights reserved. SYMBOL c A ...
Page 15
High Speed Super Low Power SRAM 128K-Word By 8 Bit - 32 pin TSOP(I) ( 8x20mm SYMBOL UNIT mm inch 32 pin PDIP ( 600 mil) - UNIT mm inch Copyright 2004 March Chiplus Semiconductor Corp. ...