74AUP1G00 PHILIPS [NXP Semiconductors], 74AUP1G00 Datasheet - Page 2

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74AUP1G00

Manufacturer Part Number
74AUP1G00
Description
Low-power 2-input NAND gate
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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3. Ordering information
Table 1.
4. Marking
Table 2.
5. Functional diagram
6. Pinning information
74AUP1G00_2
Product data sheet
Type number
74AUP1G00GW
74AUP1G00GM
74AUP1G00GF
Type number
74AUP1G00GW
74AUP1G00GM
74AUP1G00GF
Fig 1. Logic symbol
Fig 4. Pin configuration SOT353-1
GND
1
2
(TSSOP5)
B
A
Ordering information
Marking
1
2
3
B
A
74AUP1G00
6.1 Pinning
001aaf016
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
mna097
Y
5
4
4
V
Y
CC
Fig 2. IEC logic symbol
Fig 5. Pin configuration SOT886
TSSOP5
XSON6
XSON6
GND
(XSON6)
Rev. 02 — 29 June 2006
1
2
B
A
Transparent top view
74AUP1G00
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic extremely thin small outline package; no leads;
6 terminals; body 1
plastic extremely thin small outline package; no leads;
6 terminals; body 1
1
2
3
&
Marking code
pA
pA
pA
mna098
001aaf017
6
5
4
V
n.c.
Y
CC
4
1.45
1
0.5 mm
Fig 3. Logic diagram
Fig 6. Pin configuration SOT891
0.5 mm
B
A
Low-power 2-input NAND gate
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
GND
(XSON6)
B
A
Transparent top view
74AUP1G00
74AUP1G00
1
2
3
001aaf018
6
5
4
V
n.c.
Y
Version
SOT353-1
SOT886
SOT891
CC
mna099
2 of 16
Y

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