M24512-RBN6 STMICROELECTRONICS [STMicroelectronics], M24512-RBN6 Datasheet - Page 4

• Manufacturer Part Number: M24512-RBN6
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M24512
SUMMARY DESCRIPTION
These I
grammable memory (EEPROM) devices are orga-
nized as 64K x 8 bits.
Figure 2. Logic Diagram
Table 2. Signal Names
I
bi-directional data line and a clock line. The devic-
es carry a built-in 4-bit Device Type Identifier code
(1010) in accordance with the I
The device behaves as a slave in the I
with all memory operations synchronized by the
serial clock. Read and Write operations are initiat-
ed by a Start condition, generated by the bus mas-
4/24
2
C uses a two-wire serial interface, comprising a
E0, E1, E2
SDA
SCL
WC
V
V
CC
SS
E0-E2
SCL
2
WC
C-compatible electrically erasable pro-
3
V CC
V SS
Chip Enable
Serial Data
Serial Clock
Write Control
Supply Voltage
Ground
M24512
2
C bus definition.
2
C protocol,
SDA
AI02275
ter. The Start condition is followed by a Device
Select Code and Read/Write bit (RW) (as de-
scribed in
edge bit.
When writing data to the memory, the device in-
serts an acknowledge bit during the 9
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a Stop condition after an Ack for Write, and after a
NoAck for Read.
Power On Reset
In order to prevent data corruption and inadvertent
Write operations during Power-up, a Power On
Reset (POR) circuit is included. At Power-up, the
device will not respond to any command until V
has reached the Power On Reset threshold volt-
age (this threshold is lower than the V
ating voltage defined in Tables
same way, as soon as V
operating voltage, below the Power On Reset
threshold voltage, the device stops to respond to
any command.
Prior to selecting and issuing commands to the
memory, a valid and stable V
applied. This voltage must remain stable and valid
until the end of the transmission of the command
and, for a Write instruction, until the completion of
the internal write cycle (t
Figure 3. DIP, SO and TSSOP Connections
Note: See
sions, and how to identify pin-1.
PACKAGE MECHANICAL
Table
V SS
E0
E1
E2
3.), terminated by an acknowl-
1
2
3
4
M24512
CC
W
AI04035B
).
drops from the normal
8
7
6
5
section for package dimen-
CC
8
voltage must be
V CC
WC
SCL
SDA
and 9). In the
CC
th
min oper-
bit time,
CC