M24C32-R STMICROELECTRONICS [STMicroelectronics], M24C32-R Datasheet - Page 4

• Manufacturer Part Number: M24C32-R
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M24C64, M24C32
SUMMARY DESCRIPTION
These I
grammable memory (EEPROM) devices are orga-
nized as 8192 x 8 bits (M24C64) and 4096 x 8 bits
(M24C32).
Figure 2. Logic Diagram
I
bi-directional data line and a clock line. The devic-
es carry a built-in 4-bit Device Type Identifier code
(1010) in accordance with the I
The device behaves as a slave in the I
with all memory operations synchronized by the
serial clock. Read and Write operations are initiat-
ed by a Start condition, generated by the bus mas-
ter. The Start condition is followed by a Device
Select Code and Read/Write bit (RW) (as de-
scribed in
edge bit.
When writing data to the memory, the device in-
serts an acknowledge bit during the 9
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a Stop condition after an Ack for Write, and after a
NoAck for Read.
4/26
2
C uses a two-wire serial interface, comprising a
E0-E2
SCL
WC
2
C-compatible electrically erasable pro-
Table
3
3.), terminated by an acknowl-
V CC
V SS
M24C64
M24C32
2
C bus definition.
2
SDA
C protocol,
th
AI01844B
bit time,
Table 2. Signal Names
Power On Reset: V
In order to prevent data corruption and inadvertent
Write operations during Power-up, a Power On
Reset (POR) circuit is included. At Power-up, the
internal reset is held active until V
the Power On Reset (POR) threshold voltage, and
all operations are disabled – the device will not re-
spond to any command. In the same way, when
V
Power On Reset (POR) threshold voltage, all op-
erations are disabled and the device will not re-
spond to any command.
A stable and valid V
Table
logic signal.
Figure 3. DIP, SO, TSSOP and UFDFPN
Connections
Note: See
CC
E0, E1, E2
SDA
SCL
WC
V
V
CC
SS
sions, and how to identify pin-1.
drops from the operating voltage, below the
10.) must be applied before applying any
PACKAGE MECHANICAL
V SS
E0
E1
E2
CC
CC
1
2
3
4
M24C64
M24C32
Chip Enable
Serial Data
Serial Clock
Write Control
Supply Voltage
Ground
(as defined in
Lock-Out Write Protect
AI01845C
8
7
6
5
section for package dimen-
V CC
WC
SCL
SDA
CC
has reached
Table 9.
and