M48Z02-150PC1TR STMICROELECTRONICS [STMicroelectronics], M48Z02-150PC1TR Datasheet - Page 10

• Manufacturer Part Number: M48Z02-150PC1TR
• Description: 5V, 16 Kbit (2Kb x 8) ZEROPOWER SRAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M48Z02, M48Z12
Data Retention Mode
With valid V
as a conventional BYTEWIDE™ static RAM.
Should the supply voltage decay, the RAM will au-
tomatically power-fail deselect, write protecting it-
self when V
(min) window. All outputs become high imped-
ance, and all inputs are treated as “don't care.”
Note: A power failure during a WRITE cycle may
corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's con-
tent. At voltages below V
assured the memory will be in a write protected
state, provided the V
The M48Z02/12 may respond to transient noise
spikes on V
during the time the device is sampling V
fore, decoupling of the power supply lines is rec-
ommended.
The power switching circuit connects external V
to the RAM and disconnects the battery when V
rises above V
is checked. If the voltage is too low, an internal
Battery Not OK (BOK) flag will be set. The BOK
flag can be checked after power up. If the BOK flag
is set, the first WRITE attempted will be blocked.
The flag is automatically cleared after the first
WRITE, and normal RAM operation resumes. Fig-
ure 9 illustrates how a BOK check routine could be
structured.
For more information on a Battery Storage Life re-
fer to the Application Note AN1012.
Figure 10. Power Down/Up Mode AC Waveforms
Note: Inputs may or may not be recognized at this time. Caution should be taken to keep E high as V
10/16
may perform inadvertent WRITE cycles after V
power on reset is being applied to the processor, a reset condition may not occur until after the system is running.
V CC
V PFD (max)
V PFD (min)
V SO
INPUTS
OUTPUTS
CC
CC
CC
SO
that reach into the deselect window
falls within the V
applied, the M48Z02/12 operates
. As V
tPD
CC
CC
(PER CONTROL INPUT)
fall time is not less than t
PFD
rises, the battery voltage
VALID
RECOGNIZED
(min), the user can be
tF
PFD
(max), V
CC
CC
tFB
. There-
rises above V
PFD
CC
CC
F
.
PFD
Figure 9. Checking the BOK Flag Status
tDR
(min) but before normal system operations begin. Even though a
(BATTERY OK)
DON'T CARE
HIGH-Z
COMPLEMENT BACK
TO SAME ADDRESS
AT ANY ADDRESS
ADDRESS AGAIN
WRITE ORIGINAL
SAME ADDRESS
DATA BACK TO
COMPLEMENT
WRITE DATA
READ DATA
READ DATA
POWER-UP
CONTINUE
AT SAME
OF FIRST
IS DATA
tRB
READ?
YES
CC
rises past V
NOTE
NO
tR
(PER CONTROL INPUT)
OF LOW BATTERY
(BATTERY LOW)
NOTIFY SYSTEM
PFD
(DATA MAY BE
CORRUPTED)
tREC
RECOGNIZED
(min). Some systems
VALID
AI00606
AI00607