CY14E256L CYPRESS [Cypress Semiconductor], CY14E256L Datasheet

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CY14E256L

Manufacturer Part Number
CY14E256L
Description
256-Kbit (32K x 8) nvSRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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Cypress Semiconductor Corporation
Document #: 001-06968 Rev. *C
Features
• 25 ns and 45 ns Access Times
• “Hands-off” Automatic STORE on Power Down with
• STORE to QuantumTrap
• RECALL to SRAM Initiated by Software or Power-up
• Infinite READ, WRITE and RECALL Cycles
• 15 mA Typical I
• 1,000,000 STORE Cycles to QuantumTrap
• 100-Year Data Retention to QuantumTrap
• Single 5V Operation +10%
• Commercial Temperature
• SOIC Package
• RoHS Compliance
external 68µF capacitor
initiated by Software, Hardware or Autostore
Power-down
Logic Block Diagram
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
A
A
A
A
A
A
A
A
A
3
7
0
1
2
4
5
6
8
13
5
6
7
9
11
12
14
CC
at 200 ns Cycle Time
®
Nonvolatile Elements is
A
0
COLUMN DEC
COLUMN I/O
A
STATIC RAM
1
512 X 512
ARRAY
A
2
A
3
198 Champion Court
A
4
PRELIMINARY
®
Quantum Trap
A
10
on
512 X 512
STORE
RECALL
Functional Description
The Cypress CY14E256L is a fast static RAM with a nonvol-
atile element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
Infinite read and write cycles, while independent, nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down.
On power-up, data is restored to the SRAM (the RECALL
operation) from the nonvolatile memory. Both the STORE and
RECALL operations are also available under software control.
A hardware STORE may be initiated with HSB pin.
256-Kbit (32K x 8) nvSRAM
San Jose
V
CONTROL
CONTROL
CC
RECALL
POWER
STORE/
,
CA 95134-1709
V
CAP
SOFTWARE
DETECT
Revised November 28, 2006
HSB
CY14E256L
A
13
OE
CE
WE
408-943-2600
-
A
0
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CY14E256L Summary of contents

Page 1

... Document #: 001-06968 Rev. *C PRELIMINARY 256-Kbit (32K x 8) nvSRAM Functional Description The Cypress CY14E256L is a fast static RAM with a nonvol- atile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides Infinite read and write cycles, while independent, nonvolatile ® ...

Page 2

... To Scale Description Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM to CY14E256L Page [+] Feedback [+] Feedback ...

Page 3

... I/O lines left low, internal circuitry will turn off the output buffers t low. AutoStore Operation The CY14E256L stores data to nvSRAM using one of three storage operations. These three operations are Hardware Store, activated by HSB, Software Store, activated by an address sequence, and AutoStore, on device power down. ...

Page 4

... CC RECALL cycle will automatically be initiated and will take t to complete. HRECALL If the CY14E256L WRITE state at the end of power-up RECALL, the SRAM data will be corrupted. To help avoid this situation, a 10-Kohm resistor should be connected either between WE and system V Software STORE Data can be transferred from the SRAM to the nonvolatile memory by a software address sequence ...

Page 5

... RECALL, or after a STORE, the WRITE will be inhibited until a negative transition detected. This protects against inadvertent writes during power-up or brown-out conditions. Noise Considerations The CY14E256L is a high-speed memory and so must have a high-frequency bypass capacitor of approximately 0.1 µF connected between V and V , using leads and traces that ...

Page 6

... Max., V < V < Max., V < V < – Test Conditions T = 25° MHz 3.0V CC CY14E256L [1] .................................... 15 mA Ambient Temperature V CC 0°C to +70°C 4.5V to 5.5V [2] Min. Max. Unit Commercial – 0.2V). 1.5 ...

Page 7

... AC Test Conditions Input Pulse Levels .................................................. Input Rise and Fall Times (10% - 90%)........................ <5 ns Input and Output Timing Reference Levels ................... 1.5 V Document #: 001-06968 Rev. *C PRELIMINARY Test Conditions R1 480Ω 5. 255Ω CY14E256L 32-SOIC Unit °C/W TBD °C/W TBD Page [+] Feedback [+] Feedback ...

Page 8

... CY14E256L Min. Max. Unit µs 550 10 ms 4.0 4.5 V µs 150 Page [+] Feedback [+] Feedback ...

Page 9

... Document #: 001-06968 Rev. *C PRELIMINARY [10,11] Description Description DATA VALID CY14E256L 25ns part 45ns part Min. Max. Min. Max. Unit µ CY14E256L Min Max Unit 10 ms µs 1 700 300 ns [4, 5, 14] Page [+] Feedback [+] Feedback ...

Page 10

... must be > V during address transitions. IH Document #: 001-06968 Rev. *C PRELIMINARY ACE t LZCE t DOE t LZOE t ACTIVE PU [4,14 SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE [14,15] CY14E256L HZCE t HZOE DATA VALID LZWE Page [+] Feedback [+] Feedback ...

Page 11

... Switching Waveforms (continued) ADDRESS DATA IN DATA OUT Figure 9. SRAM Write Cycle #2: CE Controlled Document #: 001-06968 Rev. *C PRELIMINARY SCE PWE t SD DATA VALID HIGH IMPEDANCE CY14E256L Page [+] Feedback [+] Feedback ...

Page 12

... PRELIMINARY t VSBL t DELAY BROWN OUT BROWN OUT AutoStore TM NO STROKE (NO SRAM WRITES) NO RECALL NO RECALL (V DID NOT GO (V DID NOT BELOW V ) BELOW V ) RESET RESET Figure 10. AutoStore/Power-Up RECALL CY14E256L t STORE BROWN OUT AutoStore TM RECALL WHEN V RETURNS CC ABOVE VSWITCH Page [+] Feedback [+] Feedback ...

Page 13

... Figure 11. CE-controlled Software STORE/RECALL Cycle t HLHX HSB (IN) HSB (OUT) HIGH IMPEDANCE DATA VALID DQ (DATA OUT) Document #: 001-06968 Rev. *C PRELIMINARY t RC ADDRESS # 6 t STORE t HLBL t DELAY Figure 12. Hardware STORE Cycle CY14E256L STORE RECALL HIGH IMPEDANCE DATA VALID [11] HIGH IMPEDANCE DATA VALID Page [+] Feedback [+] Feedback ...

Page 14

... Pb-Free NVSRAM 14 - AutoStore + Software Store + Hardware Store Cypress Document #: 001-06968 Rev. *C PRELIMINARY Option Tape & Reel Blank - Std. Temperature Commercial (0 to 70°C) Package SOIC Data Bus Voltage 5.0V CY14E256L Speed Density: 256 - 256 Kb Page [+] Feedback [+] Feedback ...

Page 15

... REFERENCE JEDEC MO-119 0.405[10.287] 0.419[10.642] 32 SEATING PLANE 0.090[2.286] 0.100[2.540] 0.004[0.101] 0.026[0.660] 0.032[0.812] 0.004[0.101] 0.0100[0.254] CY14E256L Operating Range Commercial Commercial MIN. MAX. PART # S32.3 STANDARD PKG. SZ32.3 LEAD FREE PKG. 0.006[0.152] 0.021[0.533] ...

Page 16

... Document History Page Document Title: CY14E256L 256-Kbit (32K x 8) nvSRAM Document Number: 001-06968 Issue REV. ECN NO. Date ** 427789 See ECN *A 437321 See ECN *B 472053 See ECN *C 503290 See ECN Document #: 001-06968 Rev. *C PRELIMINARY Orig. of Change Description of Change TUP New Data Sheet ...

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