W9812G6GH-6 WINBOND [Winbond], W9812G6GH-6 Datasheet - Page 36

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W9812G6GH-6

Manufacturer Part Number
W9812G6GH-6
Description
2M X 4 BANKS X 16 BITS SDRAM
Manufacturer
WINBOND [Winbond]
Datasheet

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11.16
(1) CAS Latency = 2
(2) CAS Latency = 3
(a) burst length = 1
(b) burst length = 2
(a) burst length = 1
(c) burst length = 4
(d) burst length = 8
(b) burst length = 2
(c) burst length = 4
(d) burst length = 8
Auto-precharge Timing (Write Cycle)
Command
Command
Command
Command
Command
Command
Command
Command
CLK
DQ
DQ
DQ
DQ
DQ
DQ
Note )
DQ
DQ
Write
Write
Write
Write
Write
Write
Write
Write
D0
D0
D0
D0
D0
D0
D0
D0
0
When the /auto precharge command is asserted,the period from Bank Activate
command to the start of intermal precgarging must be at least tRAS (min).
Write
AP
Act
Act
D1
D1
D1
tWR
D1
D1
D1
tWR
1
AP
AP
represents the Write with Auto precharge command.
represents the start of internal precharing.
represents the Bank Active command.
D2
D2
D2
D2
tWR
tWR
2
AP
AP
tRP
D3
D3
D3
D3
3
tRP
Act
tRP
D4
tWR
tWR
D4
4
- 36 -
tRP
Act
Act
AP
D5
AP
D5
5
Act
D6
D6
tRP
6
tRP
Act
D7
D7
7
Publication Release Date:Aug. 13, 2007
Act
tWR
tWR
8
AP
AP
9
W9812G6GH
10
tRP
tRP
Act
11
Revision A06
Act
Act
12

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