AT45DB011D-MU ATMEL [ATMEL Corporation], AT45DB011D-MU Datasheet - Page 10
AT45DB011D-MU
Manufacturer Part Number
AT45DB011D-MU
Description
1-megabit 2.7-volt DataFlash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT45DB011D-MU.pdf
(52 pages)
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Table 7-2.
7.7
10
PA8/
A16
0
0
0
1
1
Chip Erase
AT45DB011D [Preliminary]
Sector Erase Addressing
PA7/
A15
0
0
1
0
1
PA6/
A14
The entire main memory can be erased at one time by using the Chip Erase command.
To execute the Chip Erase command, a 4-byte command sequence C7H, 94H, 80H and 9AH
must be clocked into the device. Since the entire memory array is to be erased, no address
bytes need to be clocked into the device, and any data clocked in after the opcode will be
ignored. After the last bit of the opcode sequence has been clocked in, the CS pin can be deas-
serted to start the erase process. The erase operation is internally self-timed and should take
place in a time of t
The Chip Erase command will not affect sectors that are protected or locked down; the contents
of those sectors will remain unchanged. Only those sectors that are not protected or locked
down will be erased.
The WP pin can be asserted while the device is erasing, but protection will not be activated until
the internal erase cycle completes.
Figure 7-1.
X
X
0
0
0
Command
Chip Erase
PA5/
A13
X
X
0
0
0
Chip Erase
CS
SI
CE
. During this time, the Status Register will indicate that the device is busy.
PA4/
A12
Each transition
represents 8 bits
X
X
0
0
0
Opcode
Byte 1
PA3/
A11
0
1
0
X
X
Byte 1
C7H
Opcode
Byte 2
PA2/
A10
X
X
X
X
0
Opcode
Byte 3
PA1/
Byte 2
A9
X
X
0
X
X
94H
Opcode
Byte 4
PA0/
A8
X
X
X
X
0
Byte 3
80H
3639B–DFLASH–02/07
Sector
0a
0b
1
2
3
Byte 4
9AH
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