STK14CA8-N25I ETC [List of Unclassifed Manufacturers], STK14CA8-N25I Datasheet - Page 5

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STK14CA8-N25I

Manufacturer Part Number
STK14CA8-N25I
Description
128K x 8 AutoStoreTM nvSRAM QuantumTrapTM CMOS Nonvolatile Static RAM
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
SRAM READ CYCLES #1 & #2
Notes
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E Controlled
December 2004
DQ (DATA OUT)
NO.
DQ (DATA OUT)
10
11
1
2
3
4
5
6
7
8
9
c: W must be high during SRAM READ cycles
d: Device is continuously selected with E and G
e: Measured ± 200mV from steady state output voltage
f: HSB must remain high during READ and WRITE cycles.
ADDRESS
ADDRESS
t
t
t
AVAV
AVQV
AXQX
#1
c
d
d
I
E
G
CC
SYMBOLS
t
t
t
t
t
t
t
t
t
ELQV
AVAV
GLQV
ELQX
EHQZ
GLQX
GHQZ
ELICC
EHICC
#2
c
e
e
b
b
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Alt.
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
STANDBY
t
AXQX
5
t
ELICCH
10
t
ELQX
6
t
GLQX
both low
8
PARAMETER
t
GLQV
t
4
AVQV
3
t
AVAV
2
t
c,f
AVAV
2
ACTIVE
t
ELQV
1
c,d,f
5
DATA VALID
STK14CA8-25
MIN
25
3
3
0
0
Document Control #ML0022 rev 1.0
MAX
25
25
12
10
10
25
DATA VALID
STK14CA8-35
MIN
35
3
3
0
0
t
GHQZ
9
t
MAX
EHQZ
7
35
35
15
13
13
35
t
EHICCL
11
STK14CA8-45
MIN
45
3
3
0
0
STK14CA8
MAX
45
45
20
15
15
45
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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