LT3689 LINER [Linear Technology], LT3689 Datasheet - Page 12

• Manufacturer Part Number: LT3689
• Description: 700mA Step-Down Regulator with Power-On Reset and Watchdog Timer
• Manufacturer: LINER [Linear Technology]

OPERATION
LT3689/LT3689-5
The LT3689 is a constant-frequency, current mode step-
down regulator with a watchdog and a reset timer that
allows microprocessor supervisory functions. Operation
can be best understood by referring to the Block Diagram.
Keeping the EN/UVLO pin at ground completely shuts off
the part drawing minimal current from the V
turn on the internal bandgap and the rest of the logic cir-
cuitry, raise the EN/UVLO pin above the accurate threshold
of 1.26V. Also, V
part to start switching.
Switching Regulator Operation
An oscillator, with frequency set by R
fl op, turning on the internal power switch. An amplifi er
and comparator monitor the current fl owing between the
V
reaches a level determined by the voltage at V
amplifi er measures the output voltage through the resistor
divider tied to the FB pin and servos the V
error amplifi er’s output increases, more current is delivered
to the output; if it decreases, less current is delivered. An
active clamp on the V
An internal regulator provides power to the control circuitry.
The bias regulator normally draws current from the V
pin, but if the OUT pin is connected to an external volt-
age higher than 3V, bias current will be drawn from the
external source (typically the regulated output voltage).
This improves effi ciency. The OUT pin also provides a
current path to the internal boost diode that charges up
the boost capacitor. The switch driver operates either from
the V
to generate a voltage at the BST pin that is higher than
the V
internal bipolar NPN power switch for effi cient operation.
To further optimize effi ciency, the LT3689 automatically
switches to Burst Mode operation in light load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down, reducing the input sup-
ply current to 85μA in a typical application. The oscillator
reduces the LT3689’s operating frequency when the volt-
age at the FB pin is low. This frequency foldback helps to
control the output current during start-up and overload
conditions.
12
IN
and SW pins, turning the switch off when this current
IN
IN
or from the BST pin. An external capacitor is used
supply. This allows the driver to fully saturate the
IN
needs to be higher than 3.7V for the
C
voltage provides current limit.
T
, enables an RS fl ip-
C
voltage. If the
IN
C
source. To
. An error
IN
A comparator monitors the current fl owing through the
catch diode via the DA pin. This comparator delays switch-
ing if the diode current goes higher than 1.2A (typical)
during a fault condition such as a shorted output with
high input voltage. The switching will only resume once
the diode current has fallen below the 1.2A limit. This
way the DA comparator regulates the valley current of the
inductor to 1.2A during a short-circuit.
The LT3689 has an overvoltage protection feature which
disables switching when the V
during transients. When switching is disabled, the LT3689
can safely sustain transient input voltages up to 60V.
Power-On Reset and Watchdog Timer Operation
The LT3689 has a power-on reset (POR) comparator that
monitors the regulated output voltage. If the output volt-
age is below 10% of the regulation value, the RST pin is
pulled low. Once the output voltage crosses over 90% of
the regulation value, a reset timer is started and RST is
released after the programmed reset delay time. The reset
delay is programmable through the C
The watchdog typically monitors a microprocessor’s activ-
ity. The watchdog can be enabled or disabled by applying
a logic signal to the WDE pin. The watchdog can be oper-
ated in either timeout or window mode by applying a logic
signal to the W/T pin. In timeout mode, the microprocessor
is required to change the logic state of the WDI pin on a
periodic basis in order to clear the watchdog timer and to
prevent the WDO from going low. In window mode, the
watchdog timer requires successive negative edges on the
WDI pin to come within a programmed time window to
keep WDO from going low. Therefore, in window mode, if
the time between the two negative WDI edges is too short
or too long, then the WDO pin will be pulled low. When the
WDO pin goes low, either in timeout or in window mode,
the reset timer turns on and keeps the WDO pin low. The
WDO pin will go high again once the reset timer expires or
the RST pin goes low when the output voltage falls 10%
below the regulation value. Both the timeout and window
periods can be set through the C
IN
goes above 38V (typical)
WDT
POR
pin.
pin.
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