LT3689 LINER [Linear Technology], LT3689 Datasheet - Page 24

• Manufacturer Part Number: LT3689
• Description: 700mA Step-Down Regulator with Power-On Reset and Watchdog Timer
• Manufacturer: LINER [Linear Technology]

LT3689/LT3689-5
In both watchdog modes, when WDO is asserted, the reset
timer is enabled. Any WDI pulses that appear while the
reset timer is running are ignored. When the reset timer
expires, the WDO is allowed to go high again. Therefore,
if no input is applied to the WDI pin, then the watchdog
circuitry produces a train of pulses on the WDO pin. The
high time of this pulse train is equal to the timeout period,
and low time is equal to the reset period. Also, WDO and
RST cannot be logic low simultaneously. If WDO is low
and RST goes low, then WDO will go high.
The WDE pin allows the user to turn on and off the
watchdog function. Do not leave this pin open. Tie it high
or low to turn watchdog off or on, respectively. The W/T
pin enables/disables the window/timeout mode. Leaving
this pin open is fi ne and will put the watchdog in window
mode. It has a weak pull-down to ground. The WDI pin
has an internal 2μA weak pull-up that keeps the WDI pin
APPLICATIONS INFORMATION
24
2V/DIV
2V/DIV
1V/DIV
V
C
RST
POR
OUT
Figure 10. Reset Timer Waveforms
50ms/DIV
Figure 12. Timeout Watchdog Waveforms (W/T = High)
t
C
RST
POR
= 165ms
= 71nF
5V/DIV
2V/DIV
1V/DIV
1V/DIV
C
C
WDO
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WDI
WDT
POR
t
WDU
= 180ms, C
t
RST
100ms/DIV
= 165ms, C
WDT
high. If watchdog is disabled, leaving this pin open is
acceptable.
Selecting the Reset Timing Capacitors
The reset timeout period is adjustable in order to accom-
modate a variety of microprocessor applications. The
reset timeout period, (t
capacitor, C
value of this capacitor is determined by:
This equation is accurate for reset timeout periods of
5ms, or greater. To program faster timeout periods, see
the Reset Timeout Period vs Capacitance graph in the
Typical Performance Characteristics section. Leaving the
C
= 10nF
POR
C
POR
POR
Figure 11. Window Watchdog Waveforms (W/T = Low)
pin unconnected will generate a minimum reset
= 71nF
= t
5V/DIV
2V/DIV
1V/DIV
1V/DIV
C
WDO
C
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WDI
WDT
POR
POR
RST
, between the C
C
• 432
WDT
= 10nF , t
RST
ms
pF
WDL
5ms/DIV
), is adjusted by connecting a
= 5.8ms
POR
pin and ground. The
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