MCP795B10 MAS [Micro Analog systems], MCP795B10 Datasheet - Page 6

• Manufacturer Part Number: MCP795B10
• Description: SPI Real-Time Clock Calendar
• Manufacturer: MAS [Micro Analog systems]

MCP795WXX/MCP795BXX
2.0
The descriptions of the pins are listed in
FIGURE 2-1:
2.1
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already initi-
ated or in progress will be completed, regardless of the
CS input signal. If CS is brought high during a program
cycle, the device will go in Standby mode as soon as
the programming cycle is complete. When the device is
deselected, SO goes into the high-impedance state,
allowing multiple parts to share the same SPI bus. A
low-to-high transition on CS after a valid write
sequence initiates an internal write cycle. After power-
up, a low level on CS is required prior to any sequence
being initiated.
2.2
The SO pin is used to transfer data out of the
MCP795XXX. During a read cycle, data is shifted out
on this pin after the falling edge of the serial clock.
2.3
This pin is a hardware open drain from the internal
watchdog circuit. This pin requires an external pull-up
to V
N-Channel will pulse this pin low. The pulse duration is
user selectable (Address 0x0A:4). This pin has a max-
imum sink current of 10mA.
2.4
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
DS22280A-page 6
CC
. When a watchdog overflow occurs the onboard
PIN DESCRIPTION
Chip Select (CS)
Serial Output (SO)
Watchdog Output (WDO)
Serial Input (SI)
WDO
V
IRQ
V
BAT
CS
X1
X2
SS
SOIC/TSSOP
1
2
3
4
5
6
7
DEVICE PINOUTS
14
13
12
11
10
9
8
Vcc
CLKOUT/BOOT
EVHS
EVLS
SCK
SI
SO
Table
2-1.
Preliminary
2.5
The SCK is used to synchronize the communication
between a master and the MCP795XXX. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
2.6
The IRQ pin is shared with the onboard event detect
and the Alarms. This pin requires an external pull-up to
V
low during an event detection or an alarm. The pin
remains low until such time that the interrupt flag in the
register is cleared by software. This pin has a maxi-
mum sink current of 10mA.
2.7
The X1 and X2 pins connect to the onboard oscillator
block. X1 is the input to the module and X2 is the out-
put of the module. The device can be run from an
external CMOS signal by feeding into the X1 pin. If
driving X1 the X2 pin should be a No Connect.
2.8
The V
the Clock and SRAM contents when V
2.9
The CLKOUT is a push-pull output that can be used to
generate a squarewave or is used for the boot-up clock
output at power-up. Please refer to
Clockout Function
2.10
The EVHS and EVLS are inputs for the High and Low
Speed Event Detection circuit.
TABLE 2-1:
V
X1
X2
V
V
SI
WDO
SCK
CLKOUT/
BOOT
CS
IRQ
EVHS
EVLS
SO
CC
SS
BAT
CC
Pin Name
or V
BAT
Serial Clock (SCK)
Interrupt Output (IRQ)
X1, X2
V
CLKOUT/BOOT
EVHS and EVLS
BAT
pin is a secondary supply input to maintain
BAT
. The onboard N-Channel will pull the pin
PIN DESCRIPTIONS
Ground
Xtal Input, External Oscillator Input
Xtal Output
Battery Backup Input (3V Typ)
+1.8V to +5.5V Power Supply
Serial Input
Watchdog Output
Serial Clock
Clock Out (Boot Clock on
MCP795BXX)
Chip Select
Interrupt Ouput
High-Speed Event Detect Input
Low-Speed Event Detect Input
Serial Output
for more details.
 2011 Microchip Technology Inc.
Pin Function
CC
Section 9.1.2,
is removed.