NCP5425_06 ONSEMI [ON Semiconductor], NCP5425_06 Datasheet - Page 17

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NCP5425_06

Manufacturer Part Number
NCP5425_06
Description
Dual Synchronous Buck Controller
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
Control IC Power Dissipation
used, VCC, and the NCP5425 operating frequency. The
average MOSFET gate charge current typically dominates
the control IC power dissipation, and is given by:
where:
are given by:
where:
losses are:
where:
function of the PCB layout, since most of the heat is removed
through the traces connected to the pins of the IC.
CURRENT SENSING AND CURRENT SHARING
Current Sharing Errors
imbalances, inductor mismatch, and input offsets in the error
amplifiers. The first two sources of error can be controlled
through careful component selection and good layout
practice. With a 4.0 mW (parasitic winding resistance)
inductor, for example, one mV of input offset error will
represent 0.25 A of measurement error. One way to diminish
this effect is to use higher resistance inductors, but the
penalty is higher power losses in the inductors.
Current Limiting Options
IS+ and IS− pins. These pins sense a voltage, proportional
to the output current, and compare it to a fixed internal
voltage threshold. When the differential voltage exceeds
70 mV, the internal overcurrent protection system goes into
a cycle−by−cycle limiting mode. Two methods for sensing
the current are available.
The power dissipation of the IC varies with the MOSFETs
The upper (switching) MOSFET gate driver (IC) losses
The lower (synchronous) MOSFET gate driver (IC)
The junction temperature of the control IC is primarily a
The three main errors in current are from board layout
The current supplied to the load can be sensed using the
P
I
V
P
P
P
Q
f
P
Q
f
CC1
SW
SW
CONTROL(IC)
GATE(H)
GATE(L)
GATE(H)
GATE(L)
CC1
GATE(H)
GATE(L)
P CONTROL(IC) + I CC1 V CC1 ) I BST V BST
= switching frequency.
= switching frequency.
= IC quiescent supply current;
P GATE(H) + Q GATE(H)
= IC supply voltage;
P GATE(L) + Q GATE(L)
= lower MOSFET gate driver (IC) losses.
= lower MOSFET gate driver (IC) losses;
= upper MOSFET gate driver (IC) losses;
= upper MOSFET gate driver (IC) losses;
= total lower MOSFET gate charge at VCC;
= total upper MOSFET gate charge at VCC;
= control IC power dissipation;
) P GATE(H)1 ) P GATE(L)1
) P GATE(H)2 ) P GATE(L)2
f SW
f SW
V BST
V CC
http://onsemi.com
NCP5425
17
Sense Resistor
When the voltage drop across the sense resistor exceeds the
internal voltage threshold of 70 mV, a limit condition is set.
The sense resistor value is calculated by:
low value, typically less than 10 mW. Such a resistor can be
either a discrete component or a PCB trace. The resistance
of a discrete component can be more precise than a PCB
trace, but the cost is also greater. Setting the current limit
using an external sense resistor is very precise because all
the values can be designed to specific tolerances. However,
the disadvantage of using a sense resistor is its additional
constant power loss and heat generation. Trace resistance
can vary as much as "10% due to copper plating variations.
Inductor ESR
resistance of the inductor. A model of an inductor reveals
that the windings have an effective series resistance (ESR).
The voltage drop across the inductor ESR can be measured
with a simple parallel circuit: an RC integrator. If the value
of RS1 and C are chosen such that:
then the voltage measured across the capacitor C will be:
Inductor Sensing Component Selection
recommended. The value of RS1 can be calculated by:
milliohms; consult manufacturer’s data sheets for specific
values. Selection of components at these values will result
in a current limit of:
A sense resistor can be added in series with the inductor.
In a high current supply, the sense resistor will be a very
Another means of sensing current is to use the intrinsic
Select the capacitor C first. A value of 0.1 mF is
Typical values for inductor ESR range in the low
V
GATE(H)
GATE(L)
IS+
IS−
CC
Figure 11. Inductor ESR Current Sensing
R SENSE + 0.070 V
V C + ESR
R S1 +
I LIM + 0.070 V
ESR
L
RS1
+ R S1 C
L
ESR
ESR
I LIMIT
L
I LIM
ESR
C
C
Co

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