LT3581 LINER [Linear Technology], LT3581 Datasheet - Page 19

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LT3581

Manufacturer Part Number
LT3581
Description
3.3A Boost/Inverting DC/DC Converter with Fault Protection
Manufacturer
LINER [Linear Technology]
Datasheet

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applicaTions inForMaTion
Clock Synchronization
The operating frequency of the LT3581 can be set by an
external source by simply providing a digital clock signal
into the SYNC pin (R
will revert to its internal free-running oscillator clock (set
by the R
0.4V for a few free-running clock periods.
Driving SYNC high for an extended period of time effec-
tively stops the operating clock and prevents latch SR1
from becoming set (see Block Diagram). As a result, the
switching operation of the LT3581 will stop and the CLKOUT
pin will be held at ground.
The duty cycle of the SYNC signal must be between 20%
and 80% for proper operation. Also, the frequency of the
SYNC signal must meet the following two criteria:
(1) SYNC may not toggle outside the frequency range of
(2) The SYNC frequency can always be higher than the
CLOCK SYNCHRONIzATION OF ADDITIONAL
REGULATORS
The CLKOUT pin of the LT3581 can be used to synchronize
one or more other compatible switching regulator ICs as
shown in Figure 11.
The frequency of the master LT3581 is set by the external
R
by the CLKOUT pin of the master LT3581. Note that the
RT pin of the slave LT3581 must have a resistor tied to
ground. It takes a few clock cycles for the CLKOUT signal
to begin oscillating, and it’s preferable for all LT3581s to
have the same internal free-running frequency. Therefore,
in general, use the same value R
synchronized LT3581s.
T
resistor. The SYNC pin of the slave LT3581 is driven
200kHz to 2.5MHz unless it is stopped low (below
0.4V) to enable the free-running oscillator.
free-running oscillator frequency (as set by the R
resistor), f
below f
T
resistor) when the SYNC pin is driven below
OSC
.
OSC
, but should not be less than 25%
T
resistor still required). The LT3581
T
resistor for all of the
T
6.8µF
Figure 11. A Single Inductor Inverting Topology Is Synchronized
with a Boost Regulator to Generate –12V and 12V Outputs. The
External PMOS Helps Disconnect the Input from the Power Paths
During Fault Events
Also, the FAULT pins can be tied together so that a fault
condition from one LT3581 causes all of the LT3581s to
enter fault, until the fault condition disappears.
CHARGE PUMP AIDED REGULATORS
Designing charge pumps with the LT3581 can offer ef-
ficient solutions with fewer components than traditional
circuits because of the master/slave switch configuration
on the IC. Although the slave switch, SW2, operates in
phase with the master switch, SW1, it is only the current
through the master switch (SW1) that is sensed by the
current comparator (A4 in Block Diagram) as part of the
current feedback loop. This method of operation by the
master/slave switches can offer the following benefits to
charge pump designs:
V
5V
IN
ENABLE
10k
100k
43.2k
1.5µH
43.2k
6.8µF
1.5µH
GATE
V
SHDN
FAULT
RT
GATE
V
FAULT
SHDN
RT
IN
IN
SW1
SW1 SW2
MASTER
LT3581
LT3581
SLAVE
SYNC
SYNC
CLKOUT
CLKOUT
SW2
GND
GND
2.2µF
SS
SS
FB
V
FB
V
C
C
0.1µF
0.1µF
4.7µF
4.7µF
LT3581
10k
10.5k
2.2nF
1nF
130k

V
12V
830mA
OUT
143k
100pF
56pF
3581 F11
V
–12V
450mA
OUT
3581f

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