LM96080CIMT-NOPB1 NSC [National Semiconductor], LM96080CIMT-NOPB1 Datasheet - Page 10
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LM96080CIMT-NOPB1
Manufacturer Part Number
LM96080CIMT-NOPB1
Description
System Hardware Monitor with 2-Wire Serial Interface
Manufacturer
NSC [National Semiconductor]
Datasheet
1.LM96080CIMT-NOPB1.pdf
(30 pages)
www.national.com
Functional Description
1.0 GENERAL DESCRIPTION
The LM96080 provides 7 analog inputs, a temperature sen-
sor, a delta-sigma ADC (Analog-to-Digital Converter), 2 fan
speed counters, WATCHDOG registers, and a variety of in-
puts and outputs on a single chip. A two wire Serial Bus
interface is also provided. The LM96080 can perform power
supply, temperature and fan monitoring for a variety of com-
puter systems. The LM96080 is pin and software backwards
compatible with the LM80.
The LM96080 continuously converts analog inputs to 10-bit
resolution with a 2.5 mV LSb (Least Significant bit) weighting,
yielding input ranges of 0 to 2.56V. The Analog Inputs, IN0 -
IN6, are intended to be connected to the several power sup-
plies present in a typical communications infrastructure
system. Temperature can be converted to a 9-bit or 12-bit
two's complement word with resolutions of 0.5°C LSb or
0.0625°C LSb, respectively.
Fan inputs can be programmed to accept either fan failure
indicator or tachometer signals. Fan failure signals can be
programmed to be either active high or active low. Fan inputs
measure the period of tachometer pulses from the the fans,
providing a higher count for lower fan speeds. The fan inputs
are digital inputs with transition levels according to the Fan
Tach Pulse Inputs in the Electrical Characteristic table. Full
scale fan counts are 255 (8-bit counter), which represent a
stopped or very slow fan. Nominal speeds, based on a count
of 153, are programmable from 1100 to 8800 RPM. Signal
conditioning circuitry is included to accommodate slow rise
and fall times.
The LM96080 provides a number of internal registers. These
include:
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Configuration Register: Provides control and
configuration.
Interrupt Status Registers: Two registers to provide
status of each WATCHDOG limit or Interrupt event.
Interrupt Mask Registers: Allows masking of individual
Interrupt sources, as well as separate masking for each of
both hardware Interrupt outputs.
Fan Divisor/RST_OUT/OS Registers: Bits 0-5 of this
register contain the divisor bits for FAN1 and FAN2 inputs.
Bits 6-7 control the function of the RST_OUT/OS output.
OS Configuration/Temperature Resolution Register:
The configuration of the OS (Overtemperature Shutdown)
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The LM96080 is compatible with Standard Mode (Sm, 100
kbits/s) and Fast Mode (Fm, 400 kbits/s) I
of operation. LM96080 includes an analog filter on the I
digital control lines that allows improved noise immunity and
supports TIMEOUT reset function on SDA and SCL that pre-
vents I
to 8 parts on a single bus.
When enabled, the LM96080 starts by cycling through each
measurement in sequence, and it continuously loops through
the sequence based on the Conversion Rate Register (ad-
dress 07h) setting. Each measured value is compared to
values stored in WATCHDOG, or Limit Registers (addresses
2Ah - 2Dh). When the measured value violates the pro-
grammed limit, the LM96080 will set a corresponding Interrupt
in the Interrupt Status Registers (addresses 01h - 02h).
Two output Interrupt lines, INT and RST_OUT/OS, are avail-
able. INT is fully programmable with masking of each Interrupt
source, and masking of each output. RST_OUT/OS is dedi-
cated to the temperature reading WATCHDOG registers. In
addition, the Fan Divisor register has control bits to enable or
disable the hardware Interrupts.
Additional digital inputs are provided for daisy chaining the
Interrupt output pin, INT. This is done by connecting multiple
external temperature sensors (i.e. LM75 or LM73) to the BTI
(Board Temperature Interrupt) input and/or the GPI (Chassis
Intrusion) input. The Chassis Intrusion input is designed to
accept an active high signal from an external circuit that latch-
es, such as when the cover is removed from the computer.
is controlled by the lower 3 bits of this register. Bit 3
enables 12-bit temperature conversions. Bits 4-7 reflect
the lower four bits of the temperature reading for a 12-bit
resolution.
Conversion Rate Register: Controls the conversion rate
of the round robin cycle to either continuous or 728 ms.
Voltage/Temperature Channel Disable Register:
Allows voltage inputs and the local temperature
conversion to be disabled.
Value RAM: The monitoring results: temperature,
voltages, fan counts, and Fan Divisor/RST_OUT/OS
Register limits are all contained in the Value RAM. The
Value RAM consists of a total of 32 bytes. The first 10
bytes are all of the results, the next 20 bytes are the
Watchdog Register limits, and the last two bytes are at the
upper locations for Manufacturers ID and Device
Stepping/Die Revision ID.
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C bus lockup. Three address pins, A0 - A2, allow up
2
C interface modes
2
C