SC410 SEMTECH [Semtech Corporation], SC410 Datasheet - Page 22

• Manufacturer Part Number: SC410
• Description: 3A EcoSpeed TM Step-Down Regulator with LDO and Ultrasonic Power Save
• Manufacturer: SEMTECH [Semtech Corporation]

Applications Information (continued)
PCB Layout Guidelines
The optimum layout for the SC410 is shown in Figure 11.
This layout shows an integrated FET buck regulator with a
maximum current of 3A. The total PCB area is approxi-
mately 19.1mm x 11.3mm.
Critical Layout Guidelines
The following critical layout guidelines must be followed
to ensure proper performance of the device.
IC Decoupling Capacitors
•
•
•
•
•
•
•
•
IC Decoupling capacitors
PGND plane
AGND island
FB and other analog control signals
BST and LX
Capacitors and Current Loops
A 0.1 μF capacitor must be located as close as
possible to the IC and directly connected to pins
10 (LDO) and 9 (AGND).
All other decoupling capacitors must be located
as close as possible to the IC.
PGND
Figure 11 — PCB Layout
LX connection
using a Via
PGND Plane
AGND Island
•
•
•
•
•
•
SC410
PGND requires its own copper plane with no
other signal traces routed on it.
Copper planes, multiple vias, and wide traces are
needed to connect PGND to input capacitors,
output capacitors, and the PGND pins on the IC.
The PGND copper area between the input
capacitors, output capacitors, and PGND pins
must be as small as and as compact as possible
to reduce the area of the PCB that is exposed to
noise due to current fl ow on this node.
Connect PGND to AGND with a short trace or
0Ω resistor. This connection should be as close
to the IC as possible.
AGND should have its own island of copper with
no other signal traces routed on this layer that
connects the AGND pins and pad of the IC to the
analog control components.
All of the components for the analog control cir-
cuitry should be located so that the connections
FB node
VESR node
SC410
22