LT3825EFE-PBF LINER [Linear Technology], LT3825EFE-PBF Datasheet - Page 24

• Manufacturer Part Number: LT3825EFE-PBF
• Description: Isolated No-Opto Synchronous Flyback Controller with Wide Input Supply Range
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LT3825
Synchronous Gate Drive
There are several different ways to drive the synchronous
gate MOSFET. Full converter isolation requires the synchro-
nous gate drive to be isolated. This is usually accomplished
by way of a pulse transformer. Usually the pulse driver is
used to drive a buffer on the secondary as shown in the
application on the front page of this data sheet.
However, other schemes are possible. There are gate
drivers and secondary side synchronous controllers avail-
able that provide the buffer function as well as additional
features.
Capacitor Selection
In a fl yback converter, the input and output current fl ows
in pulses, placing severe demands on the input and output
fi lter capacitors. The input and output fi lter capacitors
are selected based on RMS current ratings and ripple
voltage.
Select an input capacitor with a ripple current rating
greater than:
Continuing the example:
24
I
I
RMS
RMS
=
=
V
44 4
IN MIN
36
P
(
.
IN
V
W
)
1 52 6
– 1
–
52 6
DC
DC
. %
MAX
. %
MAX
=
RIPPLE WAVEFORM
OUTPUT VOLTAGE
1 17
.
SECONDARY
Figure 7. Typical Flyback Converter Waveforms
CURRENT
CURRENT
A
PRIMARY
V
COUT
I
PRI
V
ESR
Keep input capacitor series resistance (ESR) and induc-
tance (ESL) small, as they affect electromagnetic interfer-
ence suppression. In some instances, high ESR can also
produce stability problems because fl yback converters
exhibit a negative input resistance characteristic. Refer
to Application Note 19 for more information.
The output capacitor is sized to handle the ripple current
and to ensure acceptable output voltage ripple. The out-
put capacitor should have an RMS current rating greater
than:
This is calculated for each output in a multiple winding
application.
ESR and ESL along with bulk capacitance directly affect
the output voltage ripple. The waveforms for a typical
fl yback converter are illustrated in Figure 7.
The maximum acceptable ripple voltage (expressed as a
percentage of the output voltage) is used to establish a
starting point for the capacitor values. For the purpose
of simplicity we will choose 2% for the maximum output
ripple, divided equally between the ESR step and the
Continuing the example: :
I
I
RMS
RMS
I
PRI
N
=
=
DUE TO ESL
I
8
OUT
RINGING
A
1 52 6
1–
–
52 6
DC
DC
. %
3825 F07
MAX
. %
MAX
=
8 43
.
A
3525fa