L200BB55RD AMD [Advanced Micro Devices], L200BB55RD Datasheet

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L200BB55RD

Manufacturer Part Number
L200BB55RD
Description
2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
The Am29LV200B is not offered for new designs. Please contact a Spansion representative for alter-
nates.
The following document contains information on Spansion memory products. Although the document
is marked with the name of the company that originally developed the specification, Spansion will
continue to offer these products to existing customers.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal data sheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appro and
changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
Spansion continues to support existing part numbers beginning with “Am” and “MBM”. To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Am29LV200B
Data Sheet
Publication Number 21521 Revision D
Amendment 6 Issue Date October 10, 2006

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L200BB55RD Summary of contents

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Am29LV200B Data Sheet The Am29LV200B is not offered for new designs. Please contact a Spansion representative for alter- nates. The following document contains information on Spansion memory products. Although the document is marked with the name of the company that ...

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DATA SHEET Am29LV200B 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory The Am29LV200B is not offered for new designs. Please contact a Spansion representative for alternates. DISTINCTIVE CHARACTERISTICS ■ Single power supply ...

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GENERAL DESCRIPTION The Am29LV200B Mbit, 3.0 volt-only Flash memory organized as 262,144 bytes or 131,072 words. The device is offered in 44-pin SO, 48-pin TSOP, and 48- ball FBGA packages. The word-wide data (x16) appears on DQ15-DQ0; ...

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TABLE OF CONTENTS Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Special Handling Instructions ................................................... 6 ...

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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: V Speed Options Full Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: ...

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CONNECTION DIAGRAMS A15 1 2 A14 A13 3 A12 4 A11 5 A10 WE# 11 RESET RY/BY ...

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CONNECTION DIAGRAMS NC RY/BY CE OE# 14 DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 19 DQ10 20 DQ3 21 DQ11 ...

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PIN CONFIGURATION A0–A16 = 17 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...

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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combi- nation) is formed by a combination of the elements below. Am29LV200B T -55R E C DEVICE NUMBER/DESCRIPTION Am29LV200B 2 Megabit ...

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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...

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WE# and CE and OE For program operations, the BYTE# pin determines whether the device accepts program data in bytes or words. Refer to “Word/Byte ...

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If RESET# is asserted during a program or erase oper- ation, the RY/BY# pin remains a “0” (busy) until the internal reset operation is complete, which requires a time of t (during Embedded Algorithms). The READY system can thus monitor ...

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Table 4. Am29LV200B Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: Word L Am29LV200B Byte L (Top Boot Block) Device ID: Word L Am29LV200B Byte L (Bottom Boot Block) Sector Protection Verification L L ...

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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...

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START RESET (Note 1) Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 2. Temporary Sector Unprotect ...

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COMMAND DEFINITIONS Writing specific address and data commands or sequences into the command register initiates device operations. Table 5 defines the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence resets the ...

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DQ7, DQ6, or RY/BY#. See “Write Operation Status” for information on these status bits. Any commands written to the device during the Embedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program- min ...

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The system can determine the status of the erase oper- ation by using DQ7, DQ6, DQ2, or RY/BY#. See “Write Operation Status” for information on these status bits. When ...

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The device allows reading autoselect codes even at addresses within erasing sectors, since the codes are not stored in the memory array. When the device exits the autoselect mode, the device reverts to the Erase Suspend mode, and is ...

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Command Definitions Table 5. Am29LV200B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte ...

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WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsec- tions describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...

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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

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The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles, determining the status as ...

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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...

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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I CC2 (Notes ...

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DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...

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TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalent Figure 11. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms ...

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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...

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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Hold Time WLAX Data Setup Time DVWH Write Pulse Width WLWH ...

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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE Data RY/BY VCS Notes program address program data Illustration ...

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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid ...

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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note:VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, ...

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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use OE# and CE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...

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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect ...

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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Hold Time ELAX Data Setup Time DVEH CE# Pulse Width ELEH ...

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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...

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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 programming typicals ...

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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering Am29LV200B Dwg rev AA; 10/99 21521D6 October 10, 2006 ...

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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package October 10, 2006 21521D6 Am29LV200B Dwg rev AC; 10/99 41 ...

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PHYSICAL DIMENSIONS FBA048—48-Ball Fine-Pitch Ball Grid Array, 0.80 mm pitch package Am29LV200B Dwg rev AF; 10/99 21521D6 October 10, 2006 ...

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REVISION SUMMARY Revision A (January 1998) Initial release. Revision B (July 1998) Global Expanded data sheet from Advanced Information to Preliminary version. Distinctive Characteristics Changed “Manufactured on 0.35 µm process technology” to “Manufactured on 0.32 µm process technology”. General Description ...

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Revision D6 (October 10, 2006) Global Added notice on product availability to cover sheet and first page of data sheet. Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limita- ...

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