L200BB55RD AMD [Advanced Micro Devices], L200BB55RD Datasheet - Page 11

• Manufacturer Part Number: L200BB55RD
• Description: 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is composed of latches that store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
Legend:
L = Logic Low = V
Notes:
1. Addresses are A16:A0 in word mode (BYTE# = V
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins DQ15–DQ0 operate in the byte or word configura-
tion. If the BYTE# pin is set at logic ‘1’, the device is in
word configuration, DQ15–DQ0 are active and con-
trolled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are
active and controlled by CE# and OE#. The data I/O
pins DQ8–DQ14 are tri-stated, and the DQ15 pin is
used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
control and selects the device. OE# is the output
control and gates array data to the output pins. WE#
should remain at V
whether the device outputs array data in words or
bytes.
October 10, 2006 21521D6
Read
Write
Standby
Output Disable
Reset
Sector Protect (Note 2)
Sector Unprotect (Note 2)
Temporary Sector
Unprotect
Protection/Unprotection” section.
Operation
IL
, H = Logic High = V
IH
. The BYTE# pin determines
V
0.3 V
CE#
CC
X
X
L
L
L
L
L
±
Table 1. Am29LV200B Device Bus Operations
IL
OE# WE# RESET#
IH
H
H
H
H
L
X
X
X
. CE# is the power
, V
ID
H
X
H
X
X
L
L
L
= 12.0 ± 0.5 V, X = Don’t Care, A
V
0.3 V
D A T A S H E E T
V
V
V
IH
CC
H
H
H
L
ID
ID
ID
), A16:A-1 in byte mode (BYTE# = V
Am29LV200B
±
Sector Address, A6 = H,
Sector Address, A6 = L,
A1 = H, A0 = L
A1 = H, A0 = L
the register serve as inputs to the internal state
machine. The state machine outputs dictate the func-
tion of the device. Table 1 lists the device bus
operations, the inputs and control levels they require,
and the resulting output. The following subsections
describe each of these operations in further detail.
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory
content occurs during the power transition. No
command is necessary in this mode to obtain array
data. Standard microprocessor read cycles that assert
valid addresses on the device address inputs produce
valid data on the device data outputs. The device
remains enabled for read access until the command
register contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read Operations table for timing specifica-
tions and to Figure 13 for the timing diagram. I
DC Characteristics table represents the active current
specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which
includes programming data to the device and erasing
Addresses
(Note 1)
A
A
A
X
X
X
IN
IN
IN
IN
= Addresses In, D
High-Z
High-Z
High-Z
DQ0–
D
DQ7
D
D
D
D
OUT
IN
IN
IN
IN
IL
).
BYTE#
High-Z
High-Z
High-Z
D
= V
IN
D
D
OUT
X
X
IN
IN
= Data In, D
IH
DQ8–DQ14 = High-Z,
DQ8–DQ15
DQ15 = A-1
OUT
BYTE#
High-Z
High-Z
High-Z
High-Z
= V
X
X
= Data Out
CC1
IL
in the
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