HCS166D INTERSIL [Intersil Corporation], HCS166D Datasheet

HCS166D

Manufacturer Part Number

HCS166D

Description

Radiation Hardened 8-Bit Parallel-Input/Serial Output Shift Register

Manufacturer

INTERSIL [Intersil Corporation]

Datasheet

1.HCS166D.pdf (9 pages)

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September 1995

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm

• Single Event Upset (SEU) Immunity < 2 x 10

• Dose Rate Survivability: >1 x 10

• Dose Rate Upset >10

• Latch-Up Free Under Any Conditions

• Fanout (Over Temperature Range)

• Military Temperature Range: -55

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

• Input Current Levels Ii

Description

The Intersil HCS166MS is an 8-bit shift register that has fully

synchronous serial or parallel data entry selected by an

active LOW Parallel Enable (PE) input. When the PE is LOW

one setup time before the LOW-to-HIGH clock transition,

parallel data is entered into the register. When PE is HIGH,

data is entered into internal bit position Q0 from Serial Data

Input (DS), and the remaining bits are shifted one place to

the right (Q0

clock transition. For expansion of the register in parallel to

serial converters, the Q7 output is connected to the DS input

of the succeeding stage.

The clock input is a gated OR structure which allows one

input to be used as an active LOW Clock Enable (CE) input.

The pin assignment for the CP and CE inputs is arbitrary and

con be reversed for layout convenience. The LOW-to-HIGH

transition of CE input should only take place while the CP is

HIGH for predictable operation.

A LOW on the Master Reset (MR) input overrides all other

inputs and clears the register asynchronously, forcing all bit

positions to a LOW state.

The HCS166MS utilizes advanced CMOS/SOS technology

to achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS166MS is supplied in a 16 lead Ceramic ﬂatpack

(K sufﬁx) or a SBDIP Package (D sufﬁx).

Bit-Day (Typ)

- Standard Outputs - 10 LSTTL Loads

- VIL = 0.3 VCC Max

- VIH = 0.7 VCC Min

Q2m etc.) with each positive-going

RAD s(Si)/s 20ns Pulse

5 A at VOL, VOH

C to +125

RAD (Si)/s

/mg

-9

Errors/

Parallel-Input/Serial Output Shift Register

250

Pinouts

Ordering Information

HCS166DMSR

HCS166KMSR

HCS166D/

Sample

HCS166K/

Sample

HCS166HMSR

GND

NUMBER

PART

HCS166MS

MIL-STD-1835 CDFP4-F16, LEAD FINISH C

MIL-STD-1835 CDIP2-T16, LEAD FINISH C

FLATPACK PACKAGE (FLATPACK)

16 LEAD CERAMIC DUAL-IN-LINE

16 LEAD CERAMIC METAL SEAL

METAL SEAL PACKAGE (SBDIP)

GND

TEMPERATURE

-55

RANGE

C to +125

Radiation Hardened 8-Bit

+25

TOP VIEW

C Intersil Class S

Equivalent

Sample

Die

SCREENING

Spec Number

LEVEL

File Number

VCC

16 Lead

SBDIP

16 Lead

Ceramic

Flatpack

16 Lead

SBDIP

16 Lead

Ceramic

Flatpack

Die

PACKAGE

VCC

518758

2482.2

Related parts for HCS166D

HCS166D Summary of contents

Page 1

... C to +125 C MIL-STD-1835 CDFP4-F16, LEAD FINISH GND Ordering Information PART NUMBER HCS166DMSR HCS166KMSR HCS166D/ Sample HCS166K/ Sample HCS166HMSR 250 Radiation Hardened 8-Bit 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) TOP VIEW VCC ...

Page 2

Functional Diagram MASTER PARALLEL CLOCK RESET ENABLE ENABLE High Level L = Low ...

Page 3

Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage ...

Page 4

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL TPHL VCC = 4.5V TPLH TPHL VCC = 4.5V NOTES: 1. All voltages referenced to device GND measurements assume RL = 500 ...

Page 5

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Quiescent Current ICC VCC = 5.5V, VIN = VCC or GND Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V Output Current IOH VCC ...

Page 6

CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTES: 1. Alternate Group A testing in ...

Page 7

Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Veriﬁcation (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...

Page 8

AC Timing Diagrams and AC Load Circuit tr t/f MAX tPHL tPLH VS tTHL FIGURE 1. CLOCK PRE-REQUISITE TIMES AND PROPAGA- TION AND OUTPUT TRANSITION TIMES VALID DATA VS tSU FIGURE 3. DATA ...

Page 9

Die Characteristics DIE DIMENSIONS mils METALLIZATION: Type: AlSi Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY < 2 A/cm BOND PAD SIZE: ...

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