PIC24FJ16GA MICROCHIP [Microchip Technology], PIC24FJ16GA Datasheet - Page 139

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PIC24FJ16GA

Manufacturer Part Number
PIC24FJ16GA
Description
28/44-Pin General Purpose, 16-Bit Flash Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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REGISTER 14-1:
© 2008 Microchip Technology Inc.
bit 1
bit 0
Note 1:
If SPIEN = 1, these functions must be assigned to available RPn pins before use. See Section 9.4
“Peripheral Pin Select” for more information.
SPITBF: SPIx Transmit Buffer Full Status bit
1 = Transmit not yet started, SPIxTXB is full
0 = Transmit started, SPIxTXB is empty
In Standard Buffer mode:
Automatically set in hardware when CPU writes SPIxBUF location, loading SPIxTXB.
Automatically cleared in hardware when SPIx module transfers data from SPIxTXB to SPIxSR.
In Enhanced Buffer mode:
Automatically set in hardware when CPU writes SPIxBUF location, loading the last available buffer location.
Automatically cleared in hardware when a buffer location is available for a CPU write.
SPIRBF: SPIx Receive Buffer Full Status bit
1 = Receive complete, SPIxRXB is full
0 = Receive is not complete, SPIxRXB is empty
In Standard Buffer mode:
Automatically set in hardware when SPIx transfers data from SPIxSR to SPIxRXB.
Automatically cleared in hardware when core reads SPIxBUF location, reading SPIxRXB.
In Enhanced Buffer mode:
Automatically set in hardware when SPIx transfers data from SPIxSR to buffer, filling the last unread
buffer location.
Automatically cleared in hardware when a buffer location is available for a transfer from SPIxSR.
SPIxSTAT: SPIx STATUS AND CONTROL REGISTER (CONTINUED)
PIC24FJ64GA004 FAMILY
Preliminary
DS39881C-page 137

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