PIC24FJ16GA MICROCHIP [Microchip Technology], PIC24FJ16GA Datasheet - Page 172

• Manufacturer Part Number: PIC24FJ16GA
• Description: 28/44-Pin General Purpose, 16-Bit Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

PIC24FJ64GA004 FAMILY
18.1
The RTCC module registers are organized into three
categories:
• RTCC Control Registers
• RTCC Value Registers
• Alarm Value Registers
18.1.1
To limit the register interface, the RTCC Timer and
Alarm Time registers are accessed through corre-
sponding register pointers. The RTCC Value register
window (RTCVALH and RTCVALL) uses the RTCPTR
bits (RCFGCAL<9:8>) to select the desired Timer
register pair (see Table 18-1).
By writing the RTCVALH byte, the RTCC Pointer value,
RTCPTR<1:0> bits, decrement by one until they reach
‘00’. Once they reach ‘00’, the MINUTES and SEC-
ONDS value will be accessible through RTCVALH and
RTCVALL until the pointer value is manually changed.
TABLE 18-1:
The Alarm Value register window (ALRMVALH and
ALRMVALL)
(ALCFGRPT<9:8>) to select the desired Alarm register
pair (see Table 18-2).
By writing the ALRMVALH byte, the Alarm Pointer
value, ALRMPTR<1:0> bits, decrement by one until
they reach ‘00’. Once they reach ‘00’, the ALRMMIN
and ALRMSEC value will be accessible through
ALRMVALH and ALRMVALL until the pointer value is
manually changed.
EXAMPLE 18-1:
DS39881C-page 170
RTCPTR
<1:0>
asm volatile("push w7");
asm volatile("push w8");
asm volatile("disi #5");
asm volatile("mov #0x55, w7");
asm volatile("mov w7, _NVMKEY");
asm volatile("mov #0xAA, w8");
asm volatile("mov w8, _NVMKEY");
asm volatile("bset _RCFGCAL, #13"); //set the RTCWREN bit
asm volatile("pop w8");
asm volatile("pop w7");
00
01
10
11
RTCC Module Registers
REGISTER MAPPING
uses
RTCVAL<15:8>
RTCVAL REGISTER MAPPING
RTCC Value Register Window
WEEKDAY
MINUTES
MONTH
SETTING THE RTCWREN BIT
—
the
ALRMPTR
RTCVAL<7:0>
SECONDS
HOURS
YEAR
DAY
Preliminary
bits
TABLE 18-2:
Considering that the 16-bit core does not distinguish
between 8-bit and 16-bit read operations, the user must
be aware that when reading either the ALRMVALH or
ALRMVALL bytes will decrement the ALRMPTR<1:0>
value. The same applies to the RTCVALH or RTCVALL
bytes with the RTCPTR<1:0> being decremented.
18.1.2
In order to perform a write to any of the RTCC Timer
registers, the RTCWREN bit (RCFGCAL<13>) must be
set (refer to Example 18-1).
ALRMPTR
Note:
Note:
<1:0>
00
01
10
11
This only applies to read operations and
not write operations.
WRITE LOCK
To avoid accidental writes to the timer, it is
recommended that the RTCWREN bit
(RCFGCAL<13>) is kept clear at any
other time. For the RTCWREN bit to be
set, there is only 1 instruction cycle time
window allowed between the 55h/AA
sequence and the setting of RTCWREN;
therefore, it is recommended that code
follow the procedure in Example 18-1.
ALRMVAL<15:8> ALRMVAL<7:0>
ALRMVAL REGISTER
MAPPING
Alarm Value Register Window
ALRMMNTH
ALRMMIN
ALRMWD
© 2008 Microchip Technology Inc.
—
ALRMSEC
ALRMDAY
ALRMHR
—