P89LPC901 PHILIPS [NXP Semiconductors], P89LPC901 Datasheet

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P89LPC901

Manufacturer Part Number
P89LPC901
Description
8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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1. General description
2. Features
2.1 Principal features
2.2 Additional features
The P89LPC901/902/903 are single-chip microcontrollers in low-cost 8-pin packages,
based on a high performance processor architecture that executes instructions in two
to four clocks, six times the rate of standard 80C51 devices. Many system-level
functions have been incorporated into the P89LPC901/902/903 in order to reduce
component count, board space, and system cost.
P89LPC901/902/903
8-bit microcontrollers with two-clock 80C51 core
1 kB 3 V Flash with 128-byte RAM
Rev. 04 — 21 November 2003
1 kB byte-erasable Flash code memory organized into 256-byte sectors and
16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile
data storage.
128-byte RAM data memory.
Two 16-bit counter/timers. (P89LPC901 Timer 0 may be configured to toggle a
port output upon timer overflow or to become a PWM output.)
23-bit system timer that can also be used as a Real-Time clock.
Two analog comparators (P89LPC902 and P89LPC903, single analog
comparator on P89LPC901).
Enhanced UART with fractional baudrate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities
(P89LPC903).
High-accuracy internal RC oscillator option allows operation without external
oscillator components. The RC oscillator option is selectable and fine tunable.
2.4 V to 3.6 V V
driven to 5.5 V). Industry-standard pinout with V
8, and 4.
Up to six I/O pins when using internal oscillator and reset options.
8-pin SO-8 package.
A high performance 80C51 CPU provides instruction cycle times of 167 ns to
333 ns for all instructions except multiply and divide when executing at 12 MHz.
This is six times the performance of the standard 80C51 running at the same
clock frequency. A lower clock frequency for the same performance results in
power savings and reduced EMI.
In-Application Programming (IAP-Lite) and byte erase allows code memory to be
used for non-volatile data storage.
DD
operating range with 5 V tolerant I/O pins (may be pulled up or
DD
, V
SS
, and reset at locations 1,
Product data

Related parts for P89LPC901

P89LPC901 Summary of contents

Page 1

... Single-byte erasing allows any byte( used as non-volatile data storage. 128-byte RAM data memory. Two 16-bit counter/timers. (P89LPC901 Timer 0 may be configured to toggle a port output upon timer overfl become a PWM output.) 23-bit system timer that can also be used as a Real-Time clock. ...

Page 2

... Configurable on-chip oscillator with frequency range options selected by user programmed Flash configuration bits. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 12 MHz (P89LPC901). Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog prescaler is selectable from 8 values. ...

Page 3

... P89LPC901FN P89LPC902FN 3.1 Ordering options Table 2: Type number P89LPC901xx P89LPC902xx P89LPC903xx 9397 750 12293 Product data P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Ordering information Package Name Description SO8 plastic small outline package; 8 leads; body width 7.5 mm DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1 ...

Page 4

... Philips Semiconductors 4. Block diagram P89LPC901 OSCILLATOR DIVIDER CRYSTAL OR RESONATOR Fig 1. P89LPC901 block diagram. 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core HIGH PERFORMANCE ACCELERATED 2-CLOCK 80C51 CPU 1 kB CODE FLASH INTERNAL BUS 128-BYTE DATA RAM PORT 3 CONFIGURABLE I/Os PORT 1 ...

Page 5

... DATA RAM PORT 1 INPUT PORT 0 KEYPAD INTERRUPT CPU CLOCK ON-CHIP RC OSCILLATOR Rev. 04 — 21 November 2003 P89LPC901/902/903 TIMER 0 TIMER 1 REAL-TIME CLOCK/ SYSTEM TIMER ANALOG COMPARATORS POWER MONITOR (POWER-ON RESET, BROWNOUT RESET) 002aaa445 © Koninklijke Philips Electronics N.V. 2003. All rights reserved ...

Page 6

... DATA RAM PORT 1 INPUT PORT 0 KEYPAD INTERRUPT CPU CLOCK ON-CHIP RC OSCILLATOR Rev. 04 — 21 November 2003 P89LPC901/902/903 UART TIMER 0 TIMER 1 REAL-TIME CLOCK/ SYSTEM TIMER ANALOG COMPARATORS POWER MONITOR (POWER-ON RESET, BROWNOUT RESET) 002aaa446 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 7

... Philips Semiconductors 5. Pinning information 5.1 Pinning handbook, halfpage Fig 4. P89LPC901 pinning (SO8). handbook, halfpage CLKOUT/XTAL2/P3.0 Fig 5. P89LPC901 pinning (DIP8). handbook, halfpage Fig 6. P89LPC902 pinning (SO8). handbook, halfpage Fig 7. P89LPC902 pinning (DIP8). 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core ...

Page 8

... Philips Semiconductors handbook, halfpage Fig 8. P89LPC903 pinning (SO8). 5.2 Pin description Table 3: P89LPC901 pin description Symbol Pin Type P0 I P1 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core P0.2/CIN2A/KBI2 2 7 P0.4/CIN1A/KBI4 P1 ...

Page 9

... Philips Semiconductors Table 3: P89LPC901 pin description Symbol Pin Type P3 I 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core …continued Description Port 3: Port I/O port with a user-configurable output types. During reset Port 3 latches are confi ...

Page 10

... Also used during a power-on sequence to force In-System Programming mode. Ground reference. Power Supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. Rev. 04 — 21 November 2003 P89LPC901/902/903 Section 8.12.1 “Port for details. and Table 13 “DC © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 11

... Also used during a power-on sequence to force In-System Programming mode. Ground reference. Power Supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. Rev. 04 — 21 November 2003 P89LPC901/902/903 Section 8.12.1 “Port for details. and Table 13 “DC © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 12

... Philips Semiconductors 6. Logic symbols KBI4 KBI5 CLKOUT Fig 9. P89LPC901 logic symbol. KBI4 KBI5 KBI6 KBI2 KBI0 Fig 10. P89LPC902 logic symbol. KBI4 KBI5 KBI2 Fig 11. P89LPC903 logic symbol. 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core CIN1A ...

Page 13

... P89LPC903xx - 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core highlights the differences between these three devices. For a complete list of Section 2 “Features” on page Rev. 04 — 21 November 2003 P89LPC901/902/903 1. CMP1 and UART CMP2 outputs TxD - - - © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 14

... Product data P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Rev. 04 — 21 November 2003 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 15

... Table 7: P89LPC901 Special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H AUXR1 Auxiliary function register A2H Bit address B* B register F0H CMP1 Comparator 1 control register ...

Page 16

... Table 7: P89LPC901 Special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. KBMASK Keypad interrupt mask 86H register KBPATN Keypad pattern register 93H Bit address P0* Port 0 80H Bit address P1* ...

Page 17

... The reset values shown for these bits are ‘0’s although they are unknown when read. [3] The RSTSRC register reflects the cause of the P89LPC901/902/903 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is xx110000. ...

Page 18

Table 8: P89LPC902 Special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H AUXR1 Auxiliary function register A2H Bit address B* B register ...

Page 19

Table 8: P89LPC902 Special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. KBCON Keypad control register 94H KBMASK Keypad interrupt mask 86H register KBPATN Keypad pattern register ...

Page 20

... The reset values shown for these bits are ‘0’s although they are unknown when read. [3] The RSTSRC register reflects the cause of the P89LPC901/902/903 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is xx110000. ...

Page 21

Table 9: P89LPC903 Special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H AUXR1 Auxiliary function register A2H Bit address B* B register ...

Page 22

Table 9: P89LPC903 Special function registers * indicates SFRs that are bit addressable. Name Description SFR addr. IP0H Interrupt priority 0 HIGH B7H Bit address IP1* Interrupt priority 1 F8H IP1H Interrupt ...

Page 23

... The reset values shown for these bits are ‘0’s although they are unknown when read. [3] The RSTSRC register reflects the cause of the P89LPC901/902/903 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is xx110000. ...

Page 24

... These options are configured when the FLASH is programmed and include an on-chip Watchdog oscillator and an on-chip RC oscillator. The P89LPC901, in addition, includes an option for an oscillator using an external crystal or an external clock source. The crystal oscillator can be optimized for low, medium, or high frequency crystals covering a range from 20 kHz to 12 MHz. ...

Page 25

... Idle mode, it may be turned off prior to entering Idle, saving additional power. 8.3 On-chip RC oscillator option The P89LPC901/902/903 has a 6-bit TRIM register that can be used to tune the frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory pre-programmed value to adjust the oscillator frequency to 7.373 MHz, 2.5%. ...

Page 26

... Philips Semiconductors Fig 12. Block diagram of oscillator control (P89LPC901). Fig 13. Block diagram of oscillator control (P89LPC902). Fig 14. Block diagram of oscillator control (P89LPC903). 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core XTAL1 High freq. Med. freq. XTAL2 Low freq. OSCCLK RC OSCILLATOR (7 ...

Page 27

... The P89LPC901/902/903 has an internal wake-up timer that delays the clock until it stabilizes depending to the clock source used. If the clock source is any of the three crystal selections (P89LPC901) the delay is 992 OSCCLK cycles plus 60 to 100 s. 8.7 CPU CLOCK (CCLK) modification: DIVM register The OSCCLK frequency can be divided down up to 510 times by confi ...

Page 28

... External interrupt inputs The P89LPC901/902/903 has a Keypad Interrupt function. This can be used as an external interrupt input. If enabled when the P89LPC901/902/903 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to 8.14 “Power reduction modes” 9397 750 12293 ...

Page 29

... Philips Semiconductors RTCF ERTC (RTCCON.1) WDOVF Fig 15. Interrupt sources, interrupt enables, and power-down wake-up sources (P89LPC901). RTCF ERTC (RTCCON.1) WDOVF Fig 16. Interrupt sources, interrupt enables, and power-down wake-up sources (P89LPC902). 9397 750 12293 Product data 8-bit microcontrollers with two-clock 80C51 core ...

Page 30

... RTCF ERTC (RTCCON.1) WDOVF Fig 17. Interrupt sources, interrupt enables, and power-down wake-up sources (P89LPC903). 8.12 I/O ports The P89LPC901 has between 3 and 6 I/O pins: P0.4, P0.5, P1.2, P1.5, P3.0, and P3.1 The exact number of I/O pins available depends on the clock and reset options chosen, as shown in Table 11: Number of I/O pins available Clock source ...

Page 31

... The P89LPC901/902/903 device, however, the pins are 5 V-tolerant (except for XTAL1 and XTAL2). In quasi-bidirectional mode user applies the pin, there will be a current fl ...

Page 32

... V (see BO above the P89LPC901/902/903 device is to operate with a power supply that can be below 2.7 V, BOE should be left in the unprogrammed state so that the device can operate at 2.4 V, otherwise continuous brownout reset may prevent the device from operating. For correct activation of Brownout detect, the V observed ...

Page 33

... Idle mode. 8.14.2 Power-down mode The Power-down mode stops the oscillator in order to minimize power consumption. The P89LPC901/902/903 exits Power-down mode via any reset, or certain interrupts. In Power-down mode, the power supply voltage may be reduced to the RAM keep-alive voltage V Power-down mode was entered. SFR contents are not guaranteed after V been lowered to V via reset in this case ...

Page 34

... For any other reset, previously set flag bits that have not been cleared will remain set. 8.16 Timers/counters 0 and 1 The P89LPC901/902/903 has two general purpose timers which are similar to the standard 80C51 Timer 0 and Timer 1. These timers have four operating modes (modes and 3). Modes 0, 1, and 2 are the same for both Timers. Mode 3 is different ...

Page 35

... Real-Time clock/system timer The P89LPC901/902/903 has a simple Real-Time clock that allows a user to continue running an accurate timer while the rest of the device is powered-down. The Real-Time clock can be a wake- interrupt source. The Real-Time clock is a 23-bit down counter comprised of a 7-bit prescaler and a 16-bit loadable down counter. When it reaches all ‘ ...

Page 36

... SMOD1 = 1 Timer 1 Overflow (PCLK-based) ¸ 2 SMOD1 = 0 Baud Rate Generator (CCLK-based) Rev. 04 — 21 November 2003 P89LPC901/902/903 th data bit, and a stop bit Section 8.18.5 “Baud rate generator Figure SBRGS = 0 Baud Rate Modes 1 and 3 SBRGS = 1 002aaa419 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 37

... SBUF data. 8.19 Analog comparators One analog comparator is provided on the P89LPC901. Two analog comparators are provided on the P89LPC902 and P89LPC903 devices. Comparator operation is such that the output is a logical one (which may be read in a register) when the positive input is greater than the negative input (selectable from a pin or an internal reference voltage). Otherwise the output is a zero. The comparator may be confi ...

Page 38

... Product data 8-bit microcontrollers with two-clock 80C51 core Comparator 1 OE1 CO1 Change Detect CN1 Change Detect Comparator 2 CO2 OE2 CN2 , is 1.23 V 10%. Rev. 04 — 21 November 2003 P89LPC901/902/903 CMP1 (P0.6) CMF1 Interrupt EC CMF2 CMP2 (P0.0) 002aaa453 © Koninklijke Philips Electronics N.V. 2003. All rights reserved ...

Page 39

... Watchdog timer in Watchdog mode. Feeding the watchdog requires a two-byte sequence. If PCLK is selected as the Watchdog clock and the CPU is powered-down, the watchdog is disabled. The Watchdog timer has a time-out period that ranges from a few few seconds. Please refer to the P89LPC901/902/903 User’s Manual for more details. 9397 750 12293 ...

Page 40

... Flash program memory 8.26.1 General description The P89LPC901/902/903 Flash memory provides in-circuit electrical erasure and programming. The Flash can be erased, read, and written as bytes. The Sector and Page Erase functions can erase any Flash sector (256 bytes) or page (16 bytes). The Chip Erase operation will erase the entire program memory ...

Page 41

... Flash organization The P89LPC901/902/903 program memory consists of four 256 byte sectors. Each sector can be further divided into 16-byte pages. In addition to sector erase, page erase, and byte erase, a 16-byte page register is included which allows from bytes of a given page to be programmed at the same time, substantially reducing overall programming time. In addition, erasing and reprogramming of user-programmable confi ...

Page 42

... This is accomplished through the use of four SFRs consisting of a control/status register, a data register, and two address registers. Additional details may be found in the P89LPC901/902/903 User’s Manual . 8.26.7 Using flash as data storage The Flash code memory array of this device supports individual byte erasing and programming ...

Page 43

... Nonetheless suggested that conventional precautions be taken to avoid applying greater than the rated maximum. [3] Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V noted. 9397 750 12293 Product data P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Conditions , SS SS ...

Page 44

... DC electrical characteristics 3.6 V unless otherwise specified +85 C for industrial, unless otherwise specified. amb Symbol Parameter I power supply current, DD operating (P89LPC901) I power supply current, Idle ID mode (P89LPC901) I power supply current, DD operating (P89LPC902, P89LPC903) I power supply current, Idle ...

Page 45

... Pin capacitance is characterized but not tested. [7] The specifications are measured using an external clock with the following functions disabled: comparators, brownout detect and Watchdog timer (P89LPC901). [8] The specifications are measured with the following functions disabled: comparators, brownout detect, and Watchdog timer DD PD (P89LPC902, P89LPC903) ...

Page 46

... RC oscillator frequency RCOSC (nominal f = 7.3728 MHz) trimmed amb f internal Watchdog oscillator WDOSC frequency (nominal f = 400 kHz) Crystal oscillator (P89LPC901) f oscillator frequency OSC t clock cycle CLCL f CLKLP active frequency CLKP Glitch filter glitch rejection, P1.5/RST pin signal acceptance, P1.5/RST pin glitch rejection, any pin except P1 ...

Page 47

... XHQX XHDX Valid Valid Valid 0 0 CHCL t CLCX Conditions 0 < V < Rev. 04 — 21 November 2003 P89LPC901/902/903 Set TI Valid Valid Valid Valid Set RI 002aaa425 t CHCX t CLCH t C 002aaa416 Min Typ Max - ...

Page 48

... 0.49 0.25 5.0 4.0 6.2 1.27 0.36 0.19 4.8 3.8 5.8 0.0100 0.20 0.16 0.244 0.05 0.041 0.0075 0.19 0.15 0.228 REFERENCES JEDEC JEITA MS-012 Rev. 04 — 21 November 2003 P89LPC901/902/903 detail 1.0 0.7 1.05 0.25 0.25 0.1 0.4 0.6 0.039 0.028 0.028 0.01 0.01 0.004 0.016 0.024 0.012 ...

Page 49

... 0.53 1.07 0.36 9.8 6.48 2.54 0.38 0.89 0.23 9.2 6.20 0.021 0.042 0.014 0.39 0.26 0.1 0.015 0.035 0.009 0.36 0.24 REFERENCES JEDEC JEITA MO-001 SC-504-8 Rev. 04 — 21 November 2003 P89LPC901/902/903 3.60 8.25 10.0 7.62 0.254 3.05 7.80 8.3 0.14 0.32 0.39 0.3 0.01 0.12 0.31 0.33 EUROPEAN ISSUE DATE PROJECTION 99-12-27 03-02-13 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 50

... C (SnPb process) or below 245 C (Pb-free process) – for all the BGA and SSOP-T packages 9397 750 12293 Product data P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Rev. 04 — 21 November 2003 ). stg(max) © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...

Page 51

... C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 9397 750 12293 Product data P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core 2.5 mm Rev. 04 — 21 November 2003 3 350 mm ...

Page 52

... Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 9397 750 12293 Product data P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Suitability of IC packages for wave, reflow and dipping soldering methods [1] ...

Page 53

... Modifications: • Changed CIN to CIN1A throughout document. • Changed CMP to CMP1 throughout document. • Figure 1 “P89LPC901 block diagram.” on page • Figure 2 “P89LPC902 block diagram.” on page • Figure 3 “P89LPC903 block diagram.” on page • Table 5 “P89LPC903 pin description” on page • ...

Page 54

... Rev. 04 — 21 November 2003 P89LPC901/902/903 Fax: + 24825 © Koninklijke Philips Electronics N.V. 2003. All rights reserved ...

Page 55

... Special function registers . . . . . . . . . . . . . . . . 14 8 Functional description . . . . . . . . . . . . . . . . . . 24 8.1 Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . 24 8.2 Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 8.3 On-chip RC oscillator option . . . . . . . . . . . . . . 25 8.4 Watchdog oscillator option . . . . . . . . . . . . . . . 25 8.5 External clock input option (P89LPC901 8.6 CPU CLock (CCLK) wake-up delay . . . . . . . . 27 8.7 CPU CLOCK (CCLK) modification: DIVM register 8.8 Low power select . . . . . . . . . . . . . . . . . . . . . . 27 8.9 Memory organization . . . . . . . . . . . . . . . . . . . 27 8.10 Data RAM arrangement . . . . . . . . . . . . . . . . . 27 8.11 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8 ...

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