P89LPC913 PHILIPS [NXP Semiconductors], P89LPC913 Datasheet - Page 45

• Manufacturer Part Number: P89LPC913
• Description: 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9397 750 14468
Product data
Fig 23. Watchdog timer in Watchdog mode (WDTE = ‘1’).
(1) Watchdog reset can also be caused by an invalid feed sequence, or by writing to WDCON not immediately followed by a
Watchdog
oscillator
feed sequence.
MOV WFEED1, #0A5H
MOV WFEED2, #05AH
PCLK
9.24 Watchdog timer
WDCON (A7H)
32
In order to use the Keypad Interrupt as an original KBI function like in 87LPC76x
series, the user needs to set KBPATN = 0FFH and PATN_SEL = 1 (not equal), then
any key connected to Port 0 which is enabled by the KBMASK register will cause the
hardware to set KBIF and generate an interrupt if it has been enabled. The interrupt
may be used to wake up the CPU from Idle or Power-down modes. This feature is
particularly useful in handheld, battery-powered systems that need to carefully
manage power consumption yet also need to be convenient to use.
In order to set the flag and cause an interrupt, the pattern on Port 0 must be held
longer than 6 CCLKs.
The watchdog timer causes a system reset when it underflows as a result of a failure
to feed the timer prior to the timer reaching its terminal count. It consists of a
programmable 12-bit prescaler, and an 8-bit down counter. The down counter is
decremented by a tap taken from the prescaler. The clock source for the prescaler is
either the PCLK or the nominal 400 kHz Watchdog oscillator. The watchdog timer can
only be reset by a power-on reset. When the watchdog feature is disabled, it can be
used as an interval timer and may generate an interrupt.
watchdog timer in Watchdog mode. Feeding the watchdog requires a two-byte
sequence. If PCLK is selected as the watchdog clock and the CPU is powered-down,
the watchdog is disabled. The watchdog timer has a time-out period that ranges from
a few s to a few seconds. Please refer to the P89LPC912/913/914 User’s Manual for
more details.
PRE2
PRESCALER
PRE1
Rev. 03 — 17 December 2004
CONTROL REGISTER
PRE0
–
8-bit microcontrollers with two-clock 80C51 core
–
8-BIT DOWN
WDL (C1H)
COUNTER
P89LPC912/913/914
WDRUN
WDTOF
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Figure 23
WDCLK
002aaa423
RESET
see note (1)
shows the
SHADOW
REGISTER
FOR WDCON
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