P89LPC920FDH PHILIPS [NXP Semiconductors], P89LPC920FDH Datasheet - Page 13

• Manufacturer Part Number: P89LPC920FDH
• Description: 8-bit microcontrollers with two-clock 80C51 core 2 kB/4 kB/8 kB 3 V low-power Flash with 256-byte data RAM
• Manufacturer: PHILIPS [NXP Semiconductors]

Table 4:
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TRIM
WDCON
WDL
WFEED1
WFEED2
All ports are in input only (high impedance) state after power-up.
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is ‘0’. If any are written while BRGEN = 1, the result is unpredictable.
The RSTSRC register reflects the cause of the P89LPC920/921/922 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset
value is xx110000.
After reset, the value is 111001x1, i.e., PRE2-PRE0 are all ‘1’, WDRUN = 1 and WDCLK = 1. WDTOF bit is ‘1’ after watchdog reset and is ‘0’ after power-on reset. Other resets will
not affect WDTOF.
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
The only reset source that affects these SFRs is power-on reset.
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Special function registers
Description
Internal oscillator trim register
Watchdog control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
…continued
SFR
addr.
A7H
C1H
C2H
C3H
96H
Bit functions and addresses
PRE2
MSB
-
ENCLK
PRE1
TRIM.5
PRE0
TRIM.4
-
TRIM.3
-
WDRUN
TRIM.2
WDTOF
TRIM.1
WDCLK
TRIM.0
LSB
Reset value
Hex
FF
[5] [6]
[4] [6]
Binary
11111111