P89LV51RD2BA PHILIPS [NXP Semiconductors], P89LV51RD2BA Datasheet - Page 39

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P89LV51RD2BA

Manufacturer Part Number
P89LV51RD2BA
Description
8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheets

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Product data
7.5.5 Framing error
7.5.6 More about UART mode 1
Table 26:
Table 27:
Framing error (FE) is reported in the SCON.7 bit if SMOD0 (PCON.6) =
SMOD0 = 0, SCON.7 is the SM0 bit for the UART, it is recommended that SM0 is set
up before SMOD0 is set to ‘1’.
Reception is initiated by a detected 1-to-0 transition at RxD. For this purpose RxD is
sampled at a rate of 16 times whatever baud rate has been established. When a
transition is detected, the divide-by-16 counter is immediately reset to align its
rollovers with the boundaries of the incoming bit times.
The 16 states of the counter divide each bit time into 16ths. At the 7th, 8th, and 9th
counter states of each bit time, the bit detector samples the value of RxD. The value
accepted is the value that was seen in at least 2 of the 3 samples. This is done for
noise rejection. If the value accepted during the first bit time is not 0, the receive
circuits are reset and the unit goes back to looking for another 1-to-0 transition. This
is to provide rejection of false start bits. If the start bit proves valid, it is shifted into the
input shift register, and reception of the rest of the frame will proceed.
The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the
following conditions are met at the time the final shift pulse is generated: (a) RI = 0,
and (b) Either SM2 = 0, or the received stop bit =
If either of these two conditions is not met, the received frame is irretrievably lost. If
both conditions are met, the stop bit goes into RB8, the 8 data bits go into SBUF, and
RI is activated.
Bit
3
2
1
0
SM0, SM1
0 0
0 1
1 0
1 1
SCON - Serial port control register (address 98H) bit description
SCON - Serial port control register (address 98H) SM0/SM1 mode definition
Symbol
TB8
RB8
TI
RI
Rev. 04 — 02 December 2004
UART mode
0: shift register
1: 8-bit UART
2: 9-bit UART
3: 9-bit UART
Description
The 9th data bit that will be transmitted in Modes 2 and 3. Set or
clear by software as desired.
In Modes 2 and 3, is the 9th data bit that was received. In Mode 1,
it SM2 = 0, RB8 is the stop bit that was received. In Mode 0, RB8
is undefined.
Transmit interrupt flag. Set by hardware at the end of the 8th bit
time in Mode 0, or at the stop bit in the other modes, in any serial
transmission. Must be cleared by software.
Receive interrupt flag. Set by hardware at the end of the 8th bit
time in Mode 0, or approximately halfway through the stop bit time
in all other modes. (See SM2 for exceptions). Must be cleared by
software.
P89LV51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
1
Baud rate
CPU clock/6
variable
CPU clock/32 or CPU clock/16
variable
.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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