P89LV51RD2BA PHILIPS [NXP Semiconductors], P89LV51RD2BA Datasheet - Page 54

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P89LV51RD2BA

Manufacturer Part Number
P89LV51RD2BA
Description
8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheets

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Philips Semiconductors
Table 45:
9397 750 14342
Product data
Description
Ext. Int0
Brown-out
T0
Interrupt polling sequence
Interrupt Flag
IE0
-
TF0
7.10 Interrupt priority and polling sequence
7.9 Security Bit
The first two options are more reliable because the Watchdog timer is never disabled
as in option #3. If the program counter ever goes astray, a match will eventually occur
and cause an internal reset. The second option is also not recommended if other
PCA modules are being used. Remember, the PCA timer is the time base for all
modules; changing the time base for other modules would not be a good idea. Thus,
in most applications the first solution is the best option.
;CALL the following WATCHDOG subroutine periodically.
This routine should not be part of an interrupt service routine, because if the program
counter goes astray and gets stuck in an infinite loop, interrupts will still be serviced
and the Watchdog will keep getting reset. Thus, the purpose of the Watchdog would
be defeated. Instead, call this subroutine from the main program within 2
the PCA timer.
The Security Bit protects against software piracy and prevents the contents of the
flash from being read by unauthorized parties in Parallel Programmer Mode. It also
protects against code corruption resulting from accidental erasing and programming
to the internal flash memory.
When the Security Bit is activated all parallel programming commands except for
Chip-Erase are ignored (thus the device cannot be read). However, ISP reading,
writing, or erasing of the user’s code can still be performed if the serial number and
length has not been programmed. Therefore, when a user requests to program
the Security Bit, the programmer should prompt the user and program a serial
number into the device.
The device supports eight interrupt sources under a four level priority scheme.
Table 45
SPI serial interface and the UART share the same interrupt vector. (See
1. Periodically change the compare value so it will never match the PCA timer.
2. Periodically change the PCA timer value so it will never match the compare
3. Disable the Watchdog by clearing the WDTE bit before a match occurs and then
CLR
MOV
MOV
SETB
RET
values.
re-enable it.
Vector
Address
0003H
004BH
000BH
summarizes the polling sequence of the supported interrupts. Note that the
EA
CCAP4L,#00
CCAP4H,CH
EA
Rev. 04 — 02 December 2004
Interrupt
Enable
EX0
EBO
ET0
;Hold off interrupts
;Next compare value is within 255 counts of
;Re-enable interrupts
current PCA timer value
P89LV51RB2/RC2/RD2
Interrupt
Priority
PX0/H
PBO/H
PT0/H
8-bit microcontrollers with 80C51 core
Service
Priority
1 (highest)
2
3
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Wake-Up
Power-down
yes
no
no
Figure
16
count of
54 of 77
27).

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