LPC2364_10 NXP [NXP Semiconductors], LPC2364_10 Datasheet - Page 55
LPC2364_10
Manufacturer Part Number
LPC2364_10
Description
Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.LPC2364_10.pdf
(59 pages)
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NXP Semiconductors
16. Revision history
Table 13.
LPC2364_65_66_67_68_6
Product data sheet
Document ID
LPC2364_65_66_67_68_6
Modifications:
LPC2364_65_66_67_68_5
Modifications:
LPC2364_65_66_67_68_4
LPC2364_66_68_3
LPC2364_66_68_2
LPC2364_66_68_1
Revision history
Release date
20100201
20090409
20080417
20071220
20071001
20070103
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•
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Table 5 “Limiting
Table
Table
I
Table 9 “Dynamic characteristics of
100000 to 10000 minimum cycles.
Added
Section 7.2 “On-chip flash programming
endurance minimum specs.
Added
Section 7.25.2 “Brownout
Added
Added
Added
Added table note for XTAL1 and XTAL2 pins in
Added part LPC2364HBD100.
Section 7.2: Added sentence clarifying SRAM speeds for LPC2364HBD.
Table 5: Updated V
Table 6: Updated Z
Table 6: V
Table 6: I
Table 6: Removed R
Table 7: CCLK and IRC, added specs for >85 °C.
Added Table 9.
Updated Figure 14.
Updated Figure 11.
DD(DCDC)dpd(3V3)
6: Updated min, typical and max values for oscillator pins.
6: Updated conditions and typical values for I
Table 11 “DAC electrical
Section 7.24.4.4 “Deep power-down
Section 9.2 “Deep power-down
Section 13.2 “XTAL1
Section 13.3 “XTAL and RTC Printed-Circuit Board (PCB) layout
pu
hys
, added specs for >85 °C.
Rev. 06 — 1 February 2010
, moved 0.4 from typ to min column.
and I
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Preliminary data sheet
Preliminary data sheet
values”: Changed V
DRV
esd
pu
BAT
.
min/max.
Table note [14].
added.
detection”: Changed V
input”.
characteristics”.
flash”: Changed flash endurance spec from
ESD
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
mode”.
memory”: Removed text regarding flash
min/max to −2500/+2500.
mode”.
Change
notice
-
-
-
-
-
-
Table
DD(3V3)
DD(DCDC)pd(3V3)
3.
to V
Supersedes
LPC2364_65_66_67_68_5
LPC2364_65_66_67_68_4
LPC2364_66_68_3
LPC2364_66_68_2
LPC2364_66_68_1
-
DD(DCDC)(3V3)
, I
© NXP B.V. 2010. All rights reserved.
BATact
guidelines”.
.
;
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