LPC1767 NXP [NXP Semiconductors], LPC1767 Datasheet - Page 52
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LPC1767
Manufacturer Part Number
LPC1767
Description
32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.LPC1767.pdf
(66 pages)
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Quantity
Price
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NXP Semiconductors
LPC1769_68_67_66_65_64_4
Product data sheet
11.9 SPI
Table 15.
T
[1]
[2]
Symbol
T
T
t
t
SPI master
t
t
t
t
SPI slave
t
t
t
t
SPICLKH
SPICLKL
SPIDSU
SPIDH
SPIQV
SPIOH
SPIDSU
SPIDH
SPIQV
SPIOH
amb
Fig 17.
cy(PCLK)
SPICYC
T
processor clock CCLK.
Timing parameters are measured with respect to the 50 % edge of the clock SCK and the 10 % (90 %)
edge of the data signal (MOSI or MISO).
=
SPICYC
−
40
SPI master timing (CPHA = 1)
°
= (T
Dynamic characteristics of SPI pins
C to +85
SCK (CPOL = 0)
SCK (CPOL = 1)
Parameter
PCLK cycle time
SPI cycle time
SPICLK HIGH time
SPICLK LOW time
SPI data set-up time
SPI data hold time
SPI data output valid time
SPI output data hold time
SPI data set-up time
SPI data hold time
SPI data output valid time
SPI output data hold time
cy(PCLK)
MOSI
MISO
°
× n) ± 0.5 %, n is the SPI clock divider value (n ≥ 8); PCLK is derived from the
C.
Rev. 04 — 1 February 2010
DATA VALID
[1]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
T
DATA VALID
SPICYC
LPC1769/68/67/66/65/64
t
SPIQV
Min
10
79.6
0.485 × T
0
2 × T
2 × T
2 × T
0
2 × T
2 × T
2 × T
cy(PCLK)
cy(PCLK)
cy(PCLK)
cy(PCLK)
cy(PCLK)
cy(PCLK)
32-bit ARM Cortex-M3 microcontroller
t
t
SPICYC
SPICLKH
SPIDSU
− 5
+ 30
+ 5
+ 5
+ 35
+ 15
DATA VALID
DATA VALID
t
SPICLKL
t
SPIDH
Typ
-
-
-
-
-
-
-
-
-
-
-
-
Max
-
-
-
0.515 × T
-
-
-
-
-
-
-
-
t
© NXP B.V. 2010. All rights reserved.
002aad986
SPIOH
SPICYC
52 of 66
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns