DSPIC30F6010A MICROCHIP [Microchip Technology], DSPIC30F6010A Datasheet - Page 155
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DSPIC30F6010A
Manufacturer Part Number
DSPIC30F6010A
Description
High-Performance, 16-bit Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.DSPIC30F6010A.pdf
(236 pages)
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21.2.2
In order to ensure that a crystal oscillator (or ceramic
resonator) has started and stabilized, an Oscillator
Start-up Timer is included. It is a simple 10-bit counter
that counts 1024 T
oscillator clock to the rest of the system. The time-out
period is designated as T
every time the oscillator has to restart (i.e., on POR,
BOR and wake-up from Sleep). The Oscillator Start-up
Timer is applied to the LP, XT, XTL and HS Oscillator
modes (upon wake-up from Sleep, POR and BOR) for
the primary oscillator.
21.2.3
Enabling the LP oscillator is controlled with two
elements:
• The current oscillator group bits COSC<2:0>
• The LPOSCEN bit (OSCCON register)
The LP oscillator is ON (even during Sleep mode) if
LPOSCEN = 1. The LP oscillator is the device clock if:
• COSC<2:0> = 000 (LP selected as main oscillator)
• LPOSCEN = 1
Keeping the LP oscillator ON at all times allows for a
fast switch to the 32 kHz system clock for lower power
operation. Returning to the faster main oscillator will
still require a start-up time.
21.2.4
The PLL multiplies the clock which is generated by the
primary oscillator. The PLL is selectable to have either
gains of x4, x8 and x16. Input and output frequency
ranges are summarized in
TABLE 21-3:
The PLL features a lock output, which is asserted when
the PLL enters a phase locked state. Should the loop
fall out of lock (e.g., due to noise), the lock signal will be
rescinded. The state of this signal is reflected in the
read-only LOCK bit in the OSCCON register.
© 2011 Microchip Technology Inc.
4 MHz-10 MHz
4 MHz-10 MHz
4 MHz-7.5 MHz
and
Fin
LP OSCILLATOR CONTROL
OSCILLATOR START-UP TIMER
(OST)
PHASE-LOCKED LOOP (PLL)
PLL FREQUENCY RANGE
OSC
Multiplier
OST
PLL
x16
cycles before releasing the
x4
x8
Table
. The T
21-3.
16 MHz-40 MHz
32 MHz-80 MHz
64 MHz-120 MHz
OST
time is involved
Fout
dsPIC30F6010A/6015
21.2.5
The FRC oscillator is a fast (7.37 MHz nominal) internal
RC oscillator. This oscillator is intended to provide rea-
sonable device operating speeds without the use of an
external crystal, ceramic resonator or RC network. The
FRC oscillator can be used with the PLL to obtain
higher clock frequencies.
The dsPIC30F operates from the FRC oscillator when-
ever the current oscillator selection control bits in the
OSCCON register (OSCCON<14:12>) are set to ‘001’.
The 6-bit field specified by TUN<5:0> (OSCTUN<5:0>)
allows the user to tune the internal fast RC oscillator
(nominal 7.37 MHz). The user can tune the FRC oscil-
lator within a range of +12.6% (930 kHz) and -13% (960
kHz) in steps of 0.4% around the factory-calibrated set-
ting, see
If OSCCON<14:12> are set to ‘111’ and FPR<4:0> are
set to ‘00101’, ‘00110’ or ‘00111’, then a PLL
multiplier of 4, 8 or 16 (respectively) is applied.
TABLE 21-4:
Note:
Note:
TUN<5:0>
01 1111
01 1110
01 1101
00 0100
00 0011
00 0010
00 0001
00 0000
11 1111
11 1110
11 1101
11 1100
10 0011
10 0010
10 0001
10 0000
Bits
...
...
Table
FAST RC OSCILLATOR (FRC)
OSCTUN functionality has been provided
to
temperature effects on the FRC frequency
over a wide range of temperatures. The
tuning step size is an approximation and is
neither characterized nor tested.
When a 16x PLL is used, the FRC oscilla-
tor must not be tuned to a frequency
greater than 7.5 MHz.
21-4.
help
Center Frequency (oscillator is
running at calibrated frequency)
FRC TUNING
customers
FRC Frequency
+12.6%
+12.2%
+11.8%
...
+1.6%
+1.2%
+0.8%
+0.4%
-0.4%
-0.8%
-1.2%
-1.6%
...
-11.8%
-12.2%
-12.6%
-13.0%
DS70150E-page 155
compensate
for