LPC1774 NXP [NXP Semiconductors], LPC1774 Datasheet - Page 84

no-image

LPC1774

Manufacturer Part Number
LPC1774
Description
32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 96 kB SRAM; USB Device/Host/OTG
Manufacturer
NXP [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1774FBD144
Manufacturer:
NXP
Quantity:
1 000
Part Number:
LPC1774FBD144
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
LPC1774FBD208
Manufacturer:
INFINEON
Quantity:
25
Part Number:
LPC1774FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 16.
C
Values guaranteed by design.
[1]
[2]
Table 17.
C
Values guaranteed by design.
LPC178X_7X
Objective data sheet
Symbol
t
t
t
t
t
Read cycle parameters
t
t
Write cycle parameters
t
t
Symbol
Common to read and write cycles
t
t
t
t
t
t
t
t
t
t
t
t
Read cycle parameters
t
t
Write cycle parameters
t
t
h(W)
d(GV)
h(G)
d(AV)
h(A)
su(D)
h(D)
d(QV)
h(Q)
d(SV)
h(S)
d(RASV)
h(RAS)
d(CASV)
h(CAS)
d(WV)
h(W)
d(GV)
h(G)
d(AV)
h(A)
su(D)
h(D)
d(QV)
h(Q)
L
L
= 30 pF, T
= 30 pF, T
The data input set-up time has to be selected with the following margin:
t
The data input hold time has to be selected with the following margin:
t
su(D)
h(D)
+ sdram access time  board delay time  delay time of feedback clock  0.
+ delay time of feedback clock  sdram access time  board delay time  0.
Dynamic characteristics: Dynamic external memory interface, read strategy bits (RD bits) = 00
Dynamic characteristics: Dynamic external memory interface, read strategy bits (RD bits) = 01
amb
amb
Parameter
write hold time
output enable valid delay time
output enable hold time
address valid delay time
address hold time
data input set-up time
data input hold time
data output valid delay time
data output hold time
Parameter
chip select valid delay time
chip select hold time
row address strobe valid delay time
row address strobe hold time
column address strobe valid delay time
column address strobe hold time
write valid delay time
write hold time
output enable valid delay time
output enable hold time
address valid delay time
address hold time
data input set-up time
data input hold time
data output valid delay time
data output hold time
=
=
40
40
C to 85
C to 85
C, V
C, V
DD(REG)(3V3)
DD(REG)(3V3)
All information provided in this document is subject to legal disclaimers.
= 3.0 V to 3.6 V. All programmable delays EMCDLYCTL are bypassed.
= 3.0 V to 3.6 V. All programmable delays EMCDLYCTL are bypassed.
Rev. 2 — 27 May 2011
Conditions
Conditions
32-bit ARM Cortex-M3 microcontroller
Min
1.6
-
-
3.4
1.1
5.3
3.7
3.9
0.2
Min
2.7
1.0
2.7
1.1
2.7
1.2
3.2
1.6
-
-
3.3
1.0
5.3
3.7
3.3
0.2
-
-
Typ
2.4
-
5.0
1.7
3.8
4.3
5.8
0.6
Typ
4.1
1.6
4.1
1.7
4.1
1.8
4.8
2.3
-
4.9
1.6
3.8
4.3
4.9
0.5
LPC178x/7x
© NXP B.V. 2011. All rights reserved.
Max
4.2
-
-
7.4
3.0
1.5
5.2
8.7
1.6
Max
6.0
3.1
6.0
3.3
6.1
3.3
7.1
4.2
-
-
7.3
2.8
1.5
5.2
7.3
1.6
…continued
84 of 117
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for LPC1774