MC9S08DZ16 FREESCALE [Freescale Semiconductor, Inc], MC9S08DZ16 Datasheet - Page 386
MC9S08DZ16
Manufacturer Part Number
MC9S08DZ16
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08DZ16.pdf
(416 pages)
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Appendix A Electrical Characteristics
A.12.4
Table A-16
386
1
3
4
5
2
and
Num
SPI
Maximum baud rate must be limited to 5 MHz due to pad input characteristics.
Refer to
All timing is shown with respect to 20% V
pins. All timing assumes slew rate control disabled and high drive strength enabled for SPI output
pins.
Time to data active from high-impedance state.
Hold time to high-impedance state.
10
11
12
1
2
3
4
5
6
7
8
9
Figure A-7
1
Figure A-7
D
D
D
D
D
D
D
D
D
D
D
D
C
Cycle time
Enable lead time
Enable lag time
Clock (SPSCK) high time
Clock (SPSCK) low time
Data setup time (inputs)
Data hold time (inputs)
Access time, slave
Disable time, slave
Data setup time (outputs)
Data hold time (outputs)
Operating frequency
through
through
Table A-16. SPI Electrical Characteristic
Rating
MC9S08DZ60 Series Data Sheet, Rev. 4
Figure A-10
Figure
Master and Slave
Master and Slave
3
4
2
5
A-10.
Master
Master
Master
Master
Master
Master
Master
Master
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
DD
describe the timing requirements for the SPI system.
and 70% V
Symbol
t
t
t
t
t
t
t
t
SCKH
SCKL
t
t
SI(M)
HI(M)
t
t
HI(S)
Lead
Lead
SI(S)
t
t
t
t
SCK
SCK
t
f
f
Lag
Lag
SO
SO
HO
HO
t
dis
op
op
A
DD
, unless noted; 100 pF load on all SPI
(1/2 t
(1/2 t
f
Bus
SCK
SCK
–10
–10
Min
1/2
1/2
30
30
30
30
25
25
dc
—
—
—
/2048
2
4
0
) – 25
)– 25
f
2048
Bus
Max
1/2
1/2
—
40
40
—
—
—
—
—
—
—
—
—
—
—
—
5
/4
Freescale Semiconductor
t
t
t
t
MHz
Unit
SCK
SCK
SCK
SCK
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
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