MCF51JE128 FREESCALE [Freescale Semiconductor, Inc], MCF51JE128 Datasheet

MCF51JE128

Manufacturer Part Number

MCF51JE128

Description

An Energy-Efficient Solution from Freescale

Manufacturer

FREESCALE [Freescale Semiconductor, Inc]

Datasheet

1.MCF51JE128.pdf (47 pages)

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An Energy-Efficient Solution from Freescale

MCF51JE256/128

The MCF51JE256 series devices are members of the low-cost,

low-power, high-performance ColdFire V1 family of 32-bit

microcontrollers (MCUs).

Not all features are available in all devices or packages; see

Table 1

Freescale Semiconductor

Data Sheet: Advanced Information

32-Bit ColdFire V1 Central Processor Unit (CPU)

• Up to 50.33 MHz ColdFire CPU above 2.4 V and 40 MHz CPU above 2.1 V

• ColdFire Instruction Set Revision C (ISA_C).

• 32-bit multiply and accumulate (MAC) supports signed or unsigned integer

On-Chip Memory

• 256 K Flash comprised of two independent 128 K flash arrays;

• 32 KB System Random-access memory (RAM).

• Security circuitry to prevent unauthorized access to RAM and Flash

Power-Saving Modes

• Two ultra-low power stop modes. Peripheral clock enable register can

• Time of Day (TOD) — Ultra low-power 1/4 sec counter with up to 64 sec

• Ultra-low power external oscillator that can be used in stop modes to

Clock Source Options

• Oscillator (XOSC1) — Loop-control Pierce oscillator; 32.768 kHz crystal or

• Oscillator (XOSC2) for high frequency crystal input for MCG reference to

• Multipurpose Clock Generator (MCG) — PLL and FLL; precision trimming

System Protection

• Watchdog computer operating properly (COP) reset with option to run from

• Low-voltage detection with reset or interrupt; selectable trip points;

• Illegal opcode and illegal address detection with reset.

• Flash block protection for each array to prevent accidental write/erasure.

• Hardware CRC to support fast cyclic redundancy checks.

Development Support

• Integrated ColdFire DEBUG_Rev_B+ interface with single wire BDM

• Real-time debug with 6 hardware breakpoints (4 PC, 1 address and 1

• On-chip trace buffer provides programmable start/stop recording

This document contains information on a product under development. Freescale reserves the

right to change or discontinue this product without notice.

and 20 MHz CPU above 1.8 V across temperature range of -40°C to

105°C.

or signed fractional inputs.

read/program/erase over full operating voltage and temperature; allows

interrupt processing while programming.

contents.

disable clocks to unused modules to reduce currents.

timeout.

provide accurate clock source to the TOD. 6 µs typical wake up time from

stop3 mode.

ceramic resonator dedicated for TOD operation.

be used for system clock and USB operations.

of internal reference allows 0.2% resolution and typical +0.5% to -1%

deviation over temperature and voltage; supports CPU frequencies up to

50 MHz.

dedicated 1 kHz internal clock source or bus clock.

separate low voltage warning with optional interrupt; selectable trip points.

connection supports same electrical interface used by the S08 family

debug modules.

data).

conditions.

for a comparison of features by device.

MCF51JE256/128

80-LQFP

12mm x 12mm

Peripherals

• USB — Dual-role USB On-The-Go (OTG) device, supports USB in either

• SCIx — Two serial communications interfaces with optional 13-bit break;

• SPI1 — Serial peripheral interface with 32-bit FIFO buffer; 16-bit or 8-bit

• SPI2 — Serial peripheral interface with full-duplex or single-wire

• IIC — Up to 100 kbps with maximum bus loading; Multi-master operation;

• CMT — Carrier Modulator timer for remote control communications.

• TPMx — Two 4-channel Timer/PWM Module; Selectable input capture,

• Mini-FlexBus — Multi-function external bus interface with user

• PRACMP — Analog comparator with selectable interrupt; compare option

• ADC12 — 12-bit Successive approximation ADC with up to12

• PDB — Programmable delay block with 16-bit counter and modulus and

• DAC — 12-bit resolution DAC; configurable settling time.

Input/Output

• Up to 68 GPIOs and 1 output-only pin.

• Voltage Reference output (VREFO).

• Dedicated infrared output pin (IRO)

• Up to 16 KBI pins with selectable

• Up to 16 pins of rapid general purpose

device, host or OTG configuration. On-chip transceiver and 3.3V regulator

help save system cost, fully compliant with USB Specification 2.0. Allows

control, bulk, interrupt and isochronous transfers.

option to connect Rx input to PRACMP output on SCI1 and SCI2; High

current drive on Tx on SCI1 and SCI2; wake-up from stop3 on Rx edge.

data transfers; full-duplex or single-wire bidirectional; double-buffered

transmit and receive; master or slave mode; MSB-first or LSB-first shifting.

bidirectional; Double-buffered transmit and receive; Master or Slave

mode; MSB-first or LSB-first shifting.

Programmable slave address; Interrupt driven byte-by-byte data transfer;

supports broadcast mode and 10-bit addressing.

Carrier generator, modulator and driver for dedicated infrared out (IRO).

Can be used as an output compare timer.

output compare, or buffered edge- or center-aligned PWM on each

channel; external clock input/pulse accumulator.

programmable chip selects and the option to multiplex address and data

lines.

to programmable internal reference voltage; operation in stop3.

single-ended channels; internal bandgap reference channel; operation in

stop3; fully functional from 3.6V to 1.8V.

prescale to set reference clock to bus divided by 1 to bus divided by 2048;

8 trigger outputs for ADC module provides periodic coordination of ADC

sampling sequence with sequence completion interrupt; Back-to-Back

mode and Timed mode.

withhigh current sink capability.

polarity.

I/O (RGPIO).

Document Number: MCF51JE256

81-BGA

10mm x 10mm

100-LQFP

14mm x 14mm

Rev. 4, 08/2012

104-BGA

10mm x 10mm

Related parts for MCF51JE128

MCF51JE128 Summary of contents

Page 1

Freescale Semiconductor Data Sheet: Advanced Information An Energy-Efficient Solution from Freescale MCF51JE256/128 The MCF51JE256 series devices are members of the low-cost, low-power, high-performance ColdFire V1 family of 32-bit microcontrollers (MCUs). Not all features are available in all devices or packages; ...

Page 2

Table of Contents 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

DADP[3:0] DADM[3:0] DACO VDDA/VSSA VREFH/VREFL VREFO IRO Hardware CRC DBG BDM PTD0/BKGD/MS INTC BKGD/MS V1 ColdFire Core with MAC PTD1/CMPP2/RESET SIM PTE4/CMPP3/ TPMCLK/VPP/IRQ COP LVD FB_AD[19:0] FLASH1 128/64 KB FLASH2 128/64 KB RAM 32KB Freescale Semiconductor COCOx VDDA/VSSA HWTRS[H:A] VREFH/VREFL ...

Page 4

... Port I/O count does not include BLMS, BKGD and IRQ. BLMS BKGD are Output only, IRQ is input only. The following table describes the functional units of the MCF51JE256/128. 4 104 1 69 yes 16 MCF51JE256 Datasheet, Rev. 4 MCF51JE256 MCF51JE128 262144 131072 32K 32K 100 ...

Page 5

Unit DAC (digital to analog converter) 12-BIT SAR ADC (analog-to-digital converter) PDB (Programmable Delay Block) Mini-FlexBus USB On-the-Go CMT (Carrier Modulator Timer) MCG (Multipurpose Clock Generator) BDM (Background Debug Module) CF1 CORE (V1 ColdFire Core) PRACMP COP (Computer Operating Properly) ...

Page 6

Features Table 2. MCF51JE256/128 Functional Units (continued) Unit SPI1 (FIFO), SPI2 (Serial Peripheral Interfaces) TPM1, TPM2 (Timer/PWM Module) VREG (Voltage Regulator) XOSC1 and XOSC2 (Crystal Oscillators) 6 Function SPI1 and SPI2 provide standard master/slave capability. SPI contains a FIFO buffer ...

Page 7

Pinouts and Pin Assignments 2.1 104-Pin MAPBGA The following figure shows the 104-pin MAPBGA pinout configuration PTF6 PTF7 USB_DP A PTG0 PTA0 PTG3 B IRO PTG4 PTA6 C PTA5 PTA4 PTB1 D VSSA PTA7 PTB0 E ...

Page 8

Pinouts and Pin Assignments 2.2 100-Pin LQFP The following figure shows the 100-pin LQFP pinout configuration. PTA0/FB_D2/SS1 1 IRO 2 PTG5/FB_RW 3 4 PTG6/FB_AD19 5 PTG7/FB_AD18 PTH0/FB_OE 6 7 PTH1/FB_D0 PTA1/KBI1P0/TX1/FB_D1 8 PTA2/KBI1P1/RX1/ADP4 9 PTA3/KBI1P2/FB_D6/ADP5 10 PTA4 11 PTA5 12 ...

Page 9

MAPBGA The following figure shows the 81-pin MAPBGA pinout configuration IRO PTG0 A PTF7 PTA0 B PTA4 PTA5 C PTA7 D E ADP2 F ADP0 DACO G H VSSA VREFL Freescale Semiconductor 3 ...

Page 10

Pinouts and Pin Assignments 2.4 80-Pin LQFP The following figure shows the 80-pin LQFP pinout configuration. PTA0/FB_D2/SS1 1 IRO 2 PTA1/KBI1P0/TX1/FB_D1 3 PTA2/KBI1P1/RX1/ADP4 4 PTA3/KBI1P2/FB_D6/ADP5 5 PTA4 6 PTA5 7 PTA6 8 PTA7 9 PTB0 10 PTB1/BLMS 11 VSSA 12 ...

Page 11

Pin Assignments Package 104 81 100 80 MAPB MAPB LQFP LQFP — — — — — — — — ...

Page 12

Pinouts and Pin Assignments Table 3. Package Pin Assignments (continued) Package 104 81 100 80 MAPB MAPB LQFP LQFP ...

Page 13

Table 3. Package Pin Assignments (continued) Package 104 81 100 80 MAPB MAPB LQFP LQFP GA GA G10 G11 F10 68 — — F11 69 — — — — E10 71 — ...

Page 14

Pinouts and Pin Assignments Table 3. Package Pin Assignments (continued) Package 104 81 100 80 MAPB MAPB LQFP LQFP 100 A2 ...

Page 15

Preliminary Electrical Characteristics This section contains electrical specification tables and reference timing diagrams for the MCF51JE256/128 microcontroller, including detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications. The electrical specifications are preliminary and are from previous ...

Page 16

Preliminary Electrical Characteristics # 1 Supply voltage 2 Maximum current into V 3 Digital Input voltage Instantaneous maximum current 4 Single pin limit (applies to all port pins) 5 Storage temperature range 1 Input must be current limited to the ...

Page 17

... For most applications, P I/O ( neglected) is: I/O Solving Equation 1 and Equation 2 Freescale Semiconductor Table 6. Thermal Characteristics Rating MCF51JE256 MCF51JE128 1,2,3,4 Single-layer board — 1s 104-pin MBGA 100-pin LQFP 81-pin MBGA 80-pin LQFP Four-layer board — 2s2p 104-pin MBGA 100-pin LQFP 81-pin MBGA 80-pin LQFP ) in  ...

Page 18

Preliminary Electrical Characteristics where constant pertaining to the particular part. K can be determined from P (at equilibrium) for a known T D solving Equation 1 and Equation 2 3.4 ESD Protection Characteristics Although damage from static ...

Page 19

Symbol Characteristic 1 — Operating Voltage Output high 2 V All I/O pins, low-drive strength OH voltage All I/O pins, high-drive strength Output high 3 I Max total I OHT current Output low 4 V All I/O pins, low-drive ...

Page 20

Preliminary Electrical Characteristics # Symbol Characteristic all digital inputs, when 11 R Pull-up resistors PU 12 Internal R pull-down PD 4 resistors 13 DC injection Total MCU limit, includes IC current sum of all stressed pins ...

Page 21

Maximum is highest voltage that POR is guaranteed. 9 Run at 1 MHz bus frequency. 10 Low voltage detection and warning limits measured at 1 MHz bus frequency. 11 Factory trimmed 3.0 V, Temp = 25C. ...

Page 22

Preliminary Electrical Characteristics Table 10. Supply Current Characteristics (continued) # Symbol Parameter Stop2 mode 6 S2I 4 supply current DD Stop3 mode 7 S3I supply current DD No clocks active 1 Data in Typical column was characterized at 3.0 V, ...

Page 23

Parameter 1 5 LVD LVDSE = PRACMP Not using the bandgap (BGBE = 0) ADLPC = ADLSMP = ADC Not using the bandgap (BGBE = DAC High power mode; no ...

Page 24

Preliminary Electrical Characteristics 3.7 PRACMP Electricals # Characteristic 1 Supply voltage 2 Supply current (active) (PRG enabled) 3 Supply current (active) (PRG disabled) Supply current (ACMP and PRG all 4 disabled) 5 Analog input voltage 6 Analog input offset voltage ...

Page 25

Characteristic 1 Resolution 2 Supply current low-power mode 3 Supply current high-power mode Full-scale Settling time (1 LSB) 4 (0x080 to 0xF7F or 0xF7F to 0x080) low-power mode Full-scale Settling time (1 LSB) 5 (0x080 to 0xF7F or 0xF7F ...

Page 26

Preliminary Electrical Characteristics # Characteristic Temperature drift of offset voltage 15 1 (DAC set to 0x0800) 16 Offset aging coefficient 1 See Typical Drift figure that follows. Figure 7. Offset at Half Scale vs Temperature 3.9 ADC Characteristics # Symb ...

Page 27

Table 15. 12-bit ADC Operating Conditions (continued) # Symb Characteristic 5 V Ref Voltage Low REFL 6 V Input Voltage ADIN Input 7 C ADIN Capacitance 8 R Input Resistance ADIN 9 R Analog Source Resistance ADC ...

Page 28

Preliminary Electrical Characteristics – Figure 8. ADC Input Impedance Equivalency Diagram Table 16. 12-bit SAR ADC Characteristics full operating range # Symbol Characteristic Supply Current 1 I (ADLSMP=0, DDAD ADCO=1) ADC Asynchronous 2 ...

Page 29

Table 16. 12-bit SAR ADC Characteristics full operating range # Symbol Characteristic Integral 7 INL Non-Linearity Zero-Scale Error ADIN SSAD Full-Scale Error ADIN DDAD Quantization ...

Page 30

Preliminary Electrical Characteristics Table 17. MCG (Temperature Range = –40 to 105C Ambient) (continued) # Rating Total deviation of trimmed DCO 5 output frequency over voltage and temperature Acquisition time 6 Long term Jitter of DCO output clock (averaged over ...

Page 31

Table 18. XOSC (Temperature Range = –40 to 105C Ambient) # Characteristic Oscillator crystal or resonator 1 (EREFS = 1, ERCLKEN = 1) 2 Load capacitors Feedback resistor 3 Series resistor — Low range 4 5 Series resistor — High ...

Page 32

Preliminary Electrical Characteristics 3.11 Mini-FlexBus Timing Specifications A multi-function external bus interface called Mini-FlexBus is provided with basic functionality to interface to slave-only devices maximum bus frequency of to asynchronous or synchronous devices such as external boot ...

Page 33

Freescale Semiconductor Figure 9. Mini-FlexBus Read Timing Figure 10. Mini-FlexBus Write Timing MCF51JE256 Datasheet, Rev. 4 Preliminary Electrical Characteristics 33 ...

Page 34

Preliminary Electrical Characteristics 3.12 AC Characteristics This section describes ac timing characteristics for each peripheral system. 3.12.1 Control Timing # Parameter 1 Bus frequency (t = 1/f ) cyc Bus 2 Internal low-power oscillator period 2 3 External reset pulse ...

Page 35

RESET PIN IRQ/KBIPx IRQ/KBIPx Freescale Semiconductor t extrst Figure 11. Reset Timing t IHIL t ILIH Figure 12. IRQ/KBIPx Timing MCF51JE256 Datasheet, Rev. 4 Preliminary Electrical Characteristics 35 ...

Page 36

Preliminary Electrical Characteristics 3.12.2 TPM Timing Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the optional external source to the timer counter. These synchronizers operate from the current ...

Page 37

SPI Characteristics The following table and Figure 15 1 No. Characteristic Operating frequency 1 SPSCK period 2 Enable lead time 3 Enable lag time 4 Clock (SPSCK) high or low time 5 Data setup time (inputs) 6 Data hold ...

Page 38

Preliminary Electrical Characteristics 1 SS (OUTPUT) 2 SCK (CPOL = 0) (OUTPUT) SCK (CPOL = 1) (OUTPUT) 6 MISO MSB IN (INPUT) 11 MOSI (OUTPUT) NOTES output mode (MODFEN = 1, SSOE = 1). 2. LSBF = 0. ...

Page 39

SS (INPUT) SCK (CPOL = 0) (INPUT) 2 SCK (CPOL = 1) (INPUT) 8 MISO SLAVE (OUTPUT) 6 MOSI MSB IN (INPUT) NOTE: 1. Not defined, but normally MSB of character just received SS (INPUT) SCK (CPOL = 0) (INPUT) ...

Page 40

Preliminary Electrical Characteristics 3.14 Flash Specifications This section provides details about program/erase times and program-erase endurance for the Flash memory. Program and erase operations do not require any special power sources other than the normal V For more detailed information ...

Page 41

Table 24. Internal USB 3.3 V Voltage Regulator Characteristics (continued) # Characteristic V input with internal VREG USB33 3 disabled 4 VREG Quiescent Current 3.16 VREF Electrical Specifications # Characteristic 1 Supply voltage 2 Temperature 3 Output Load Capacitance 4 ...

Page 42

Preliminary Electrical Characteristics Table 26. VREF Limited Range Operating Behaviors # Characteristic Voltage Reference Output with 1 Factory Trim Temperature Drift (Vmin – Vmax 2 Temperature range from 0° 50° See typical chart that follows (Figure ...

Page 43

Freescale Semiconductor Figure 20. Typical VREF Output vs V MCF51JE256 Datasheet, Rev. 4 Preliminary Electrical Characteristics DD 43 ...

Page 44

... MCF51JE128 ColdFire Microcontroller MCF51JE256CML MCF51JE256 ColdFire Microcontroller MCF51JE256CLL MCF51JE256 ColdFire Microcontroller MCF51JE256CMB MCF51JE256 ColdFire Microcontroller MCF51JE256CLK MCF51JE256 ColdFire Microcontroller MCF51JE128CMB MCF51JE128 ColdFire Microcontroller MCF51JE128CLK MCF51JE128 ColdFire Microcontroller 4.2 Package Information Pin Count Package Type 100 Low Quad Flat Package 80 Low Quad Flat Package ...

Page 45

Open a browser to the Freescale document number (from 5 Revision History This section lists major changes between versions of the MCF51JE256 Data Sheet. Revision Date 0 March/April 09 1 July 2009 2 July 2009 3 April 2010 Freescale ...

Page 46

Revision History Revision Date — For parameter 3 and parameter 4 changed LPS to LPR. — For parameter 3,changed “FBILP” to “FBI”. — For parameter 4, changed “FBELP” to “BLPE”. 4 August 2012 — Added — Updated — Updated — ...

Page 47

How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter ...

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