COP8-PGMA-DS NSC [National Semiconductor], COP8-PGMA-DS Datasheet - Page 11

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COP8-PGMA-DS

Manufacturer Part Number
COP8-PGMA-DS
Description
8-Bit One-Time Programmable (OTP) Microcontroller with UART and Three Multi-Function Timers
Manufacturer
NSC [National Semiconductor]
Datasheet
Control Registers
CNTRL Register (Address X 00EE)
The Timer1 (T1) and MICROWIRE PLUS control register
contains the following bits
PSW Register (Address X 00EF)
The PSW register contains the following select bits
The Half-Carry bit is also affected by all the instructions that
affect the Carry flag The SC (Set Carry) and RC (Reset
Carry) instructions will respectively set or clear both the car-
ry flags In addition to the SC and RC instructions ADC
SUBC RRC and RLC instructions affect the carry and Half
Carry flags
ICNTRL Register (Address X 00E8)
The ICNTRL register contains the following bits
Bit 7
T1C3 T1C2 T1C1 T1C0 MSEL IEDG
Bit 7
HC
SL1
IEDG
MSEL
T1C0
T1C1
T1C2
T1C3
GIE
EXEN
BUSY
EXPND
T1ENA
T1PNDA Timer T1 Interrupt Pending Flag (Autoreload RA
C
HC
T1ENB
T1PNDB Timer T1 Interrupt Pending Flag for T1B cap-
T0EN
T0PND
WEN
WPND MICROWIRE PLUS interrupt pending
C T1PNDA T1ENA EXPND BUSY EXEN GIE
SL0 Select the MICROWIRE PLUS clock divide
Global interrupt enable (enables interrupts)
Enable external interrupt
MICROWIRE PLUS busy shifting flag
External interrupt pending
Timer T1 Interrupt Enable for Timer Underflow
or T1A Input capture edge
in mode 1 T1 Underflow in Mode 2 T1A cap-
ture edge in mode 3)
Carry Flag
Half Carry Flag
Timer T1 Interrupt Enable for T1B Input capture
edge
ture edge
Enable MICROWIRE PLUS interrupt
Timer T0 Interrupt Enable (Bit 12 toggle)
Timer T0 Interrupt pending
by (00
External interrupt edge polarity select
(0
Selects G5 and G4 as MICROWIRE PLUS
signals SK and SO respectively
Timer T1 Start Stop control in timer
modes 1 and 2
Timer T1 Underflow Interrupt Pending Flag in
timer mode 3
Timer T1 mode control bit
Timer T1 mode control bit
Timer T1 mode control bit
e
Rising edge 1
e
2 01
e
4 1x
e
Falling edge)
e
8)
SL1
SL0
Bit 0
Bit 0
11
T2CNTRL Register (Address X 00C6)
The T2CNTRL register contains the following bits
T3CNTRL Register (Address X 00B6)
The T3CNTRL register contains the following bits
Unused LPEN T0PND T0EN
Bit 7
Bit 7
Bit 7
T2C3 T2C2 T2C1 T2C0 T2PNDA T2ENA T2PNDB T2ENB
T3C3 T3C2 T3C1 T3C0 T3PNDA T3ENA T3PNDB T3ENB
LPEN
T2ENB
T2PNDB Timer T2 Interrupt Pending Flag for T2B cap-
T2ENA
T2PNDA Timer T2 Interrupt Pending Flag (Autoreload RA
T2C0
T2C1
T2C2
T2C3
T3ENB
T3PNDB Timer T3 Interrupt Pending Flag for T3B cap-
T3ENA
T3PNDA Timer T3 Interrupt Pending Flag (Autoreload RA
T3C0
T3C1
T3C2
T3C3
L Port Interrupt Enable (Multi-Input Wakeup In-
terrupt)
Bit 7 could be used as a flag
Timer T2 Interrupt Enable for T2B Input capture
edge
ture edge
Timer T2 Interrupt Enable for Timer Underflow
or T2A Input capture edge
in mode 1 T2 Underflow in mode 2 T2A cap-
ture edge in mode 3)
Timer T2 Start Stop control in timer modes 1
and 2 Timer T2 Underflow Interrupt Pending
Flag in timer mode 3
Timer T2 mode control bit
Timer T2 mode control bit
Timer T2 mode control bit
Timer T3 Interrupt Enable for T3B Input capture
edge
ture edge
Timer T3 Interrupt Enable for Timer Underflow
or T3A Input capture edge
in mode 1 T3 Underflow in mode 2 T3A cap-
ture edge in mode 3)
Timer T3 Start Stop control in timer modes 1
and 2
Timer T3 Underflow Interrupt Pending Flag in
timer mode 3
Timer T3 mode control bit
Timer T3 mode control bit
Timer T3 mode control bit
WPND
WEN T1PNDB T1ENB
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Bit 0
Bit 0
Bit 0

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