M30621MCM-F546GP MITSUBISHI [Mitsubishi Electric Semiconductor], M30621MCM-F546GP Datasheet - Page 18
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M30621MCM-F546GP
Manufacturer Part Number
M30621MCM-F546GP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30621MCM-F546GP.pdf
(24 pages)
Usage precaution
18
Noise
(4) External interrupt
(1) Insert bypass capacitor between V
(5) Rewrite the interrupt control register
• When the polarity of the INT0 to INT2 pins is changed, the interrupt request bit is sometimes set
• Insert bypass capacitor (about 0.1 F) and connect short and wide line between V
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled,
to "1". After changing the polarity, set the interrupt request bit to "0".
lines.
request for that register. If there is possibility of the interrupt request occur, rewrite the interrupt
control register after the interrupt is disabled. The program examples are described as follow:
the interrupt request bit is not set sometimes even if the interrupt request for that register has
been generated. This will depend on the instruction. If this creates problems, use the below
instructions to change the register.
Instructions : AND, OR, BCLR, BSET
Example 1:
Example 2:
Example 3:
The reason why two NOP instructions or dummy read are inserted before FSET I in Examples 1 and 2 is
to prevent the interrupt enable flag I from being set before the interrupt control register is rewritten due to
effects of the instruction queue.
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM, R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
I
#00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
I
I
#00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
I
I
#00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
FLG
_______
; Disable interrupts.
; Enable interrupts.
; Disable interrupts.
; Dummy read.
; Enable interrupts.
; Push Flag register onto stack
; Disable interrupts.
; Enable interrupts.
CC
________
and V
SS
pin for noise and latch up countermeasure.
.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62M (80-pin version) Group
Mitsubishi microcomputers
(Low voltage version)
CC
and V
SS