EP7312-CB-90 CIRRUS [Cirrus Logic], EP7312-CB-90 Datasheet - Page 17

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EP7312-CB-90

Manufacturer Part Number
EP7312-CB-90
Description
HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
SDRAM Load Mode Register Cycle
DS508PP5
SDMWE
SDCLK
SDRAS
SDCAS
SDQM
ADDR
SDCS
DATA
Note:
1. Timings are shown with CAS latency = 2
2. The SDCLK signal may be phase shifted relative to the rest of the SDRAM control and data signals due to uneven loading.
Designers should take care to ensure that delays between SDRAM control and data signals are approximately equal
t
t
t
t
MWa
t
CSa
RAa
CAa
ADv
Figure 3. SDRAM Load Mode Register Cycle Timing Measurement
©
C opyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
t
t
t
CSd
RAd
CAd
t
MWd
t
ADx
High-Performance, Low-Power System on Chip
EP7312
17

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